In previous years, NXP has started research on the characterization of the PiN diode. This re-search was mainly done to provide a compact model to design engineers. However, the rere-search was not very extensive due to time limits. Therefore, the Front-End innovation RF technology group wants a more extensive research that describes the most optimal PiN diode regarding the lowest FOM and highest BV achievable. This research is continued in this graduation project.
The main objective of this research is to make a proposition for the most optimal PiN diode, with the lowest FOM and highest BV that can be achieved. In this research, the influence of area, par-allel structures, EPI thickness is evaluated. Increasing the area and using parpar-allel structures aims at decreasing Ron, increasing the EPI thickness aims at decreasing Cof f. In addition, PPLUS and PSB diodes are compared; PPLUS diodes have an anode made of mono-Si and PSB diodes have an anode made of poly-Si. Furthermore, a recommendation will be given which other technologies are worth investigating to optimize the PiN diode further.
The PiN diodes are studied with experimental methods in the DC and RF regime. First, the focus will be on the DC characterization of the diode; the Current-Voltage (I-V) characteristics.
Secondly, the RF (small signals) characterization will take place. With the RF characterization, Ron, Cof f, insertion loss and isolation are studied upon different frequencies and voltages. Then, its corresponding results are supported by TCAD simulations.
The research is documented in this thesis, divided in 7 chapters including this first chapter; the introduction.
In chapter two, an overview of the physical background is given that is required to understand the physics involved in this research. Here, the physics of the PN junction, PiN diode, the process flow and the effect of doping profiles is discussed.
In chapter three, the experimental methodology is discussed. First, the used equipment is listed;
the DC and RF probe stations and the corresponding analyzers and software. Secondly, the mea-surement and analysis routine for the DC and RF meamea-surements is explained. Followed by an overview of the available test structures at NXP that will be measured.
Chapter four provides the simulation methodology. Starting with an explanation about the simu-lation tool TCAD and the process flow simusimu-lation. Followed by the simusimu-lation routine and analysis for the DC and RF simulation that are mimicking the measurements in reality.
Chapter five reports the obtained results via measurements and simulations that are executed to study the optimization of the FOM for the PiN diode with various approaches. The results are divided in 6 sections. First, the general behavior of the diode is shown to validate the I-V curves and the behavior of the diode with frequency. Secondly, the optimization of Ron via area scaling is studied in DC and RF. Thirdly, the optimization of Ron with using parallel diodes is discussed.
Then, varying the EPI thickness is studied to decrease Cof f and increase the BV. Followed by a comparison between PPLUS and PSB diodes. At last, it is checked if the temperature dependent behavior of the diode is as expected.
In chapter six and seven, the conclusion of this research, with an evaluation of the most optimal PiN diode, and the outlook for further research is given respectively.
2 Physical background
In this chapter, the PiN diode is studied upon its capabilities to function as a RF switch. First, the PN diode has to be explained in order to understand the capabilities of the PiN diode to work as a RF switch afterwards. At last, the doping profile throughout the layers of the diode has to be discussed to understand the consequences for the on-resistance and off-capacitance.
2.1 PN diode
The physics of the PN junction is an important basis for the understanding of other semiconductor devices, such as the PiN diode. Therefore, the structure, biasing, current-voltage characteristics and small signal model are discussed in this section.
2.1.1 Structure of the PN junction
The structure of a PN junction consists of a region doped with acceptor impurities (p-type region) and a region doped with donor impurities (n-type region). The majority charge carriers for the p-type and n-type region are holes and electrons respectively. These two regions are combined in a junction. At this junction, a large concentration gradient for electrons and holes will exist.
Therefore, the majority electrons/holes will diffuse into the p-type/n-type region respectively.
The majority electrons leave positively charged donor atoms behind and the majority holes leave negatively charged acceptor atoms behind. This region of positive and negative charges is called the depletion region (WD). The depletion region WD ranges from −WDp to WDn (Figure 2.1a and equation (1)). Along the depletion region a potential drop establishes, the built-in potential ψbi [V], described with equation (2). With ND [cm−3] and NA [cm−3] as the donor and acceptor doping concentrations respectively, T as the temperature [K], k as the boltzmann constant [1.38
·10−23 J/K], q as the elementary charge [1.6 ·10−19C] and nias the intrinsic carrier concentration [cm−3] [15][9][8]. Within the depletion region an electric field establishes and no mobile charge charges are present here (Figure 2.1b). The distribution of the electric field and built-in voltage can be determined with the Poisson equation of equation (3), with s as the dielectric permittivity [F/cm] and ρ(x) as the charge density [cm−3]. This yields equation (4) and (5) for the electric field distribution.
The built-in potential distribution is then given by equation (6) and (7) [15][9].
−d2ψi
Note that the equations above assume a constant doping profile. A constant doping profile is not achieved in practice, the effects of this are discussed in section 2.3.
If no external potential is applied to the PN junction, the junction is in thermal equilibrium;
the Fermi-level is constant throughout the system. At thermal equilibirum, no net current flows through the system. The current consists of the drift current, induced by the built-in voltage and the diffusion current, induced by the carrier concentration gradient at both edges of the depletion
layer. These two currents work in opposite direction and cancel each other when no external volt-age is applied. When an external voltvolt-age is applied, current will flow. This is called biasing the PN junction [15][9].
Figure 2.1: The space charge distribution in the PN junction (a), The distribution of the electric field in the depletion region (b), The potential distribution with built-in voltage ψbi (c) and the energy band diagram (d) [9].
2.1.2 Biasing the PN junction
When an external voltage is applied to a PN junction, the Fermi level is not constant through the system. If the external voltage is applied in such a way that the anode is placed at a lower potential than the cathode (reverse bias) the potential barrier increases. Therefore, the depletion region width also increases and the majority electrons and holes cannot diffuse into the p-region and n-region respectively. Thus, ideally, no net current will flow at reverse bias. However, in re-verse bias, the electric field and separation of positive and negative charges induces a capacitance.
This capacitance per unit area is defined in equation (8), where dQD is the differential charge [C/cm2] on each side of the junction, dV is the differential applied voltage [V]. Note that here is assumed again that the doping profile is constant [9][15].
CD=dQD
dV = s
WD = rqsN
2
ψbi− V −2kT q
−1/2
(8) equation (8) is often rearranged to equation (9). This is done because by plotting 1/C2 versus V, the impurity concentration N can be determined with the slope and the built-in voltage can be
determined at 1/C2= 0. In contrast to reverse bias, also a forward bias can be applied. In this case, the anode is placed at a higher potential than the cathode. With forward bias, the potential barrier and depletion region width decreases. When the depletion region width decreases, electrons and holes can diffuse into the p-region and n-region respectively. Therefore, there will be a net current flowing through the PN junction at forward bias [15]. With this biasing the PN junction can function as a diode. The current-voltage characteristics of the PN diode are discussed in the next section.
2.1.3 Current-Voltage characteristics
The forward-bias current density is the sum of the recombination current density Jrand the ideal diffusion current density JD. The recombination current density originates from electrons and holes that can recombine within the depletion region. Due to recombination, injected charge carriers in the depletion region are lost and additional charge carriers need to be injected to make up for this loss. The recombination current is thus the current flow of these additional injected carriers.
The recombination rate is not constant through the depletion region; it is at its maximum at the junction (the center of the depletion region). The ideal current-voltage relation is described with the ideal diode equation of equation (10). Here, V is the bias voltage [V], I0 is the saturation current [A] and VT = kTq . The saturation current is also known as the leakage current, describing the small current flow that is still possible in reverse bias. The saturation current is described with equation (11), with q as the elementary charge (1.602176634 · 1019C), A as the cross-sectional area, ni as the intrinsic carrier density, Dpand Dnas the diffusion coefficient for the holes and electrons respectively [cm2/s], ND and NA as the donor and acceptor doping concentrations respectively [cm−3] and at last τp and τn as the carrier lifetime of the holes and electrons [s] [9]. Also, the ideality factor n equals 1 if diffusion dominates and 2 if recombination dominates. Equation (10) is valid when the the series resistance of the diode is negligible, this is only true at low voltages.
At higher voltages where IRs is comparable to the bias voltage, equation (12) holds. Note that equation (12) is an implicit function. Additionally, in reverse bias one also needs to account for non ideal characteristics. One of these non ideal characteristics is the breakdown voltage. In the breakdown region, the diode conducts a large current in reverse bias and the blocking ability of the diode is lost. This breakdown is caused by two main processes. The first is the avalanche process. The avalanche process occurs when the electric field is larger than the critical electric field. The critical electric field is directly related to the material’s bandgap. When the electric field is thus large enough to overcome the bandgap, charge carriers acquire enough kinetic energy from the large electric field to create electron-hole pairs upon colliding with bound atomic electrons. The generated electrons and holes move in the opposite direction and therefore contribute to the reverse bias current. The second process is the Zener effect. The Zener effect occurs within highly doped junctions. At this highly doped junction, the p-region and n-region are sufficiently close to cause tunneling through the thin potential barrier.
This tunneling also contributes to the reverse bias current [15].
The current-voltage (I-V) characteristics are shown in Figure 2.2. Additionally, Figure 2.2 also shows a second breakdown conduction. The second breakdown is a thermoelectric effect which happens at high current densities and generally causes damage to the device [16][17].
The Energy band diagram in forward and reverse bias is shown in Figure 2.3, it can be seen that in forward bias the depletion region is much smaller than in reverse bias. In addition, the quasi
Fermi-levels in the depletion region are assumed be constant because the current also remains constant in the depletion region. This follows from equation (13) and (14) [9].
J~p= µpp 5 EF,p (13)
J~n= µnn 5 EF n (14)
Figure 2.2: The I-V characteristics of the PN diode including the saturation current, avalanche conduction and second breakdown [17].
Figure 2.3: The energy banddiagram in forward bias (left) and reverse bias (right) [9].
2.1.4 Small signal model
In the previous sections, only the DC characteristics of the PN diode are discussed. However, in most circuit applications, such as the switch circuit, RF signals are imposed on the DC voltage and current. Therefore, it is important to highlight the small-signal characteristics of the PN diode.
Assume the diode is forward biased with a DC voltage and produces a DC current. If a small amplitude RF signal (compared to the DC voltage) is applied, a small RF current is superimposed on the DC current. With this RF voltage and current, the small signal conductance can be defined with equation (15). If the RF voltage and current are very small, the conductance is simply the slope of the DC I-V curve (Figure 2.2) at a certain operating point [15]. In the same manner, the small-signal resistance can be defined with equation (16).
gd= dID dVa
Va=V0
(15)
rd= dVa
dId
ID=IDC
(16)
Also, with imposing RF signals a capacitance becomes important in the forward bias impedance;
the diffusion capacitance. This diffusion capacitance is due to the change in hole/electron concen-tration over time upon a RF voltage. If the RF voltage increases during its positive/negative half cycle, the concentration of holes at the junction increases/decreases. The holes at the junction diffuse into the n-region where they recombine with the majority electrons. Therefore, the hole concentration as function of the distance in the n-region also varies over time upon a RF voltage.
The same holds for the electrons that diffuse into the p-region. This charging and discharging of holes and electrons in the n-region an p-region respectively induces the diffusion capacitance [15].
Equation (17) describes the diffusion capacitance as a function of current I [A], lifetime τ [s]. Note that the diffusion capacitance is only presence at low frequencies. At low frequencies the lifetime of the carriers is smaller than the period of the RF signal and the carriers can thus follow the signal.
When the lifetime is much greater than the period of the RF signal, the diffusion capacitance is not observed [18].
Cdif f = qIτ
2kT (17)