Automatic wiring design

Automatic wiring design

Citation for published version (APA):

van Lier, M. C., & Otten, R. H. J. M. (1973). Automatic wiring design. ( EUT report. E, Fac. of Electrical Engineering; Vol. 73-E-37). Technische Hogeschool Eindhoven.

Document status and date: Published: 01/01/1973

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by

Ir. M.C. van Lier and

Eindhoven University of Technology, Eindhoven, The Netherlands.

AUTOMATIC WIRING DESIGN

by

Ir. M.C. van Lier and

Ir. R.H.J.M. Otten

T.H. Report 73-E-37

May 1973

INTRODUCTION

I. GRAPHTHEORETICAL NOTIONS II. ROUTING ALGORITHMS

1 • Simple connection algorithm on a grid 2. Simple connection algorithm on a graph 3. Simple multilayer connection algorithm

4.

Generalizations

!II. THE MATHEMATICAL FORMULATION OF THE WIRING PROBLEM

l. Introduction

2. Graphtheoretical base

3. The mathematical formulation

4.

Examples

5. Concluding remarks

IV. EXAMPLE OF AN IC-LAYOUT

V. THE CEL-ALGORITHM

1. Assigning a drain function toa graph 2. Deltas and their formulas

3. The CEL-algorithm 4. Two examples

VI. OTHER PLANARITY ALGORITHMS

J. A planarity-test based on an iterative decomposition method ("pseudo-Hamiltonian method")

2. Planarity-tests based on matrix methods 3. The whirl-rnethod

VII. THE PLANARISATION OF NONPLANAR NETWORKS

I. Terminalvalues

2. Planar equivalents of polygons 3. Concluding remarks Appendix 3 10 JO 12 15 18 22 22 23 29 32 35

44

49 49 55 60 65 70 70 78 86 89 89 94 97 98

INTRODUCTION

This report emanatcs from a seminar of the group EEC, held in spring 1972, and it reflects our knowledge in the field of automatic wiring design, built up during the first months of that year. At the second session the participants discussed the schematic overview of page 2. The framed subjects in this scheme were pointed out as topics of the sessions to follow.

~~-

-~,---~~-In the seminar the simultaneous "placement-and-routing"-part was emphasized, so that only the Lee-Akers-algorithm was presented (by Prof. Jess at the third session), since it was the most representative and general of all routing algorithms. A flaw was elicited during this session and a correction seemed to be difficult. Our ideas about this algorithm are more mature now and that is why the treatment of the subject is different in this report. Starting from a simple "minimum-distance" algorithm we generalize as far as possible ending up with an abstract model.

Next in this report we have a short introduction to notions in graph theory, although this was a subject of the fourth session. This reordering was

necessary, because of the final description of routing algorithms and problem formulations in which some of the notions are employed.

The mathematical formulation is published as an article in the "International Journal of Circuit Theory and Applications". The fourth and the fifth constraint were presented in the formulation for the whirl problem, hut the solutions

given during the session were basically wrong. We added some directives for technological modifications.

Four planarity tests were given then

!. CEL-algorithm: preceded by the treatment of "drain functions" and "deltas and their formulas";

2. pseudo-hamiltonian method; 3. methods using matrices; 4. whirl method.

The last session was concerned with planarization of networks. It concludes also this report.

separate place-ment and routing

1

off-line

1

ACCEL (Automated Circuit Card et-ching layout ) 1. placement-algori thm, using a concept of forces; 2. routing by a mixt ure of the LEE-AKERS-algo-ri thm and a topographic simulation. on-line

1

CADIC (Computer-Aided Design of Integrated Circuits) with a graphical display; placement by hand and routing with the LEE-algorithm.

matrix DAMBIT DUNN & CHAH

simultaneous placement_ and path-routing

construction of the potential-graph from the circuit with or without certain constraints planarity-test on the total graph constructive WEINBERG denumeratio CEDERBAUM EVEN LEMPEL e emen ary 1 planarity-test by checking the planarity of certain subgraphs windows cut-sets

YOSHIDA

&

OHTA CHUNG

&

ROE

modi fi cat ions

circuits and bridges

AUSLANDER

&

PARTER

DEMOUCRON

BADER

1

F ISHER

& WINGI HOTZ

Planar drawing

taking the dimensions into account

I. GRAPHTHEORET ICAL NOTIONS

We start from a non-empty set G, the so-called set of vertices. On this set we define a binary relation: r ç;, G x G. The elements of rare cal led arcs. Our notation of an are will be [x,y> with x and y as terminalvertices. In the following the set of arcs will be designated by V.

The pair consisting of G and Vis called a digraph, and is denoted by (G,V). We assume the relation fto be antireflexive (this means [x,x>ir).

A

digraph

is finite, when G is finite. We will restrict ourselves to finite digraphs.

I f the relation ris symmetrie ([x,y>e:f+-{y,x>e:f), we speak of a graph, here denoted by (G,U) with U

=

{[x,yJJ [x,y>e:f}. U is a set of non-ordered pairs of vertices, called edges. We speak of a multigraph, when U is a family.

The relation rcan be treated as any other binary relation: We write ye:f(x), when [x,y>e:f.

The inverse of ris denoted by r-l and is defined by r-l (y)

=

{xJye:f(x)}. We define the powers of r in the following way:

r0(x) ={x} r1(x) = r(x)

r1(x) = r(ri-I (x)) (i is a non-negatieve integer)

r-i(x) = (r-l)i(x)

The transitive closure

f

of fis defined by

f

(x) For digraphs we have also the following notions:

2 3

=

{x}ur(x)ur (x) ur (x)u •••••

+

Jr(x)J 1s called the out-degree of x and is denoted by y (x). Jr-1(x) 1 1s called the in-degree of x and is denoted by y- (x).

+

-y(x)

=

y (x) + y (x) is the degree of x.

-1

-xe:G 1s a source, when r (x)

=

0

or equivalently Y (x)

=

0

xe:G is a sink, when r(x)

=

0

or equivalently y+(x)

=

0

For graphs we have only the degree of xe:G: y(x)

=

J{yJ[x,y]e:U}I.

Suppose we have two digraphs (G

1

,v

1) and (G2

,v

2), and a bijective mapping ~

from G

1 into

c

2• Then ~ is called an isomorphic mapping (or an isomorphism),

if

[ x,y>e:V

If such a mapping exists, then (G

1

,v

1) and (G2,V2) are called isomorphic. For graphs we have a similar definition.

A graph (G,U) is called topological if:

1. G is a set of points in a topological space R, and U is a set of open Jordancurves in R,

2. the terminalpoints of an edge of U are in G,

3. the edges of U have no other points in connnon than terminalpoints.

In the case of digraphs we give the Jordancurve [x,y> an orientation in the direction of y.

(G',U') is a topological representation of (G,U), if (G,U) and (G',U') are isomorphic and (G',U') is a topólogical graph.

A graph is called planar, when it has a topological representation in a plane.

The graph (G',U') is a subgraph of (G,U), when G'cG and V U'[uEU]. U€

The name chain is given to a sequence vl ,v2'

....

'

vk of arcs of (G,V) such that, i f v.

=

l. [x. ,y.>, then Y· l. l. l.

=

x. l. + 1 for i

=

1 ' 2,

.

...

'

k - 1. A chain

is simple, i f no are occurs twice in the sequence. I t is called elementary, if it does not contain a vertex twice. We denote a chain by C[x

1, yk>, A cycle is a chain in which x

1

=

yk. A cycle is elementary if, apart from x₁ and yk' every vertex in it is distinct from the others.

A digraph is called acyclic, when it has no cycles. The length of a chain is the number of its arcs.

A path is a sequence u

1,u2, ••••• ,uk of edges of a graph (G,U) in which we have with u.

=

[x.,y.], that y.

=

x. +

1 and y. 1

=

x. for i

=

2,3, ••• , k - 1.

l. l. l. l. l. l. - l.

A path is simple, when all its edges are different, and elementary, when every vertex in it appears only once. A path is denoted by PCx₁,yk]. A circuit is a path with x

1

=

yk' and it is called elementary, when all its vertices x')' _....

. . .

.

' ~ are distinct •

A graph (G,U) is connected, if for every pair of vertices in G there is a path between them. A component of (G,U) is a maximal connected subgraph of (G,U). A vertex x of G is an articulation point of (G,U), if the number of components of the subgraph obtained by deleting x and all the edges incident to x is one higher than in (G,U).

Theo rem 1: A vertex ais an articulation point of a con~ected graph, if and only if there exist two vertices x and y such that every path joining x and y contains a. (x

#

a ~ y).

The proof of this theorem is trivial.

A graph (G,U) is said to be biconnected, if it is connected, and it contains more than one edge and no points of articulation.

Theo rem 2: Given any elementary path P[a

0,a1, .••• , ak] joining two distinct vertices a

0 and ak of a biconnected graph (G,U), we can associate with it two elementary paths P' and P" such

that:

1 • P' and P" join both ao and ak,

2. _{ao and ak are the only vertices which P' and P" have}

l.n common,

3. i f P' or P" is followed from ao to ak' the indices of the vertices of P encountered on route are in increasing order.

Proof: The theorem is trivially true, when P has length 1 (P =[a₀,a₁

J),

for U contains at least two edges, and neither a₀ nor a₁ can be an

articulation point.

Let us assume the theorem to be true for all elementary paths of length k, and deduce from this that it is also true for the elementary path

By hypothesis there exist two disjoint paths

Pb

and Pö joining a

0

and ak, and satisfying the conditions of the theorem. We now have to show the existence of two paths P' and P" between a

0 and ak + I

with analogous properties.

From theorem I we know that there is a path Q[a

₀

,~ +IJ' which does not contain ak. Let us denote by q the vertex of Q[a

0,ak + 1J nearest

to ak + ₁, and which is also in P[a

0

,~J or P

₀

Ca

₀,akJ or PöCa₀,akJ. We distinguish four cases:

I. q = ao:

This case is simple: P' Ca

0,ak + IJ = P[a0, ak + IJ P"[a

0,ak + IJ = Q[ao, ak + IJ II. q=ak+l"

This means that q

i

P[a

0,akJ. This leaves two analogous cases:

qe P

₀

[a

0,akJ or qePö[a0,akJ. Take for example qeP

0

[a0,akJ' then P'[aO,ak + IJ= PO[ao,qJ

P"[aO,ak + IJ= PÖ[aO,akJ + [ak, ak + IJ III. q{P[a₀,ak + ₁J:

This means that either qeP

₀

[a

0,akJ or qePÖ[a0,akJ. In the latter

case (the farmer isanalogous), we take

IV. qeP[aI,akJ:

P'[aO,ak +IJ= PO[aO,akJ +[ak,ak +IJ P"[aO,ak +IJ= Pö[ao,qJ + Q[q,ak + IJ

Then we can write q

=

a with m<k. Let p be the highest index with

m

apeP[a₀,ak + IJ' apePö[a₀,ak + IJ (apeP

0

[a₀,akJ is analogous)

and plO:m.

In such a case we take

P'[aO,ak + IJ P"[aO,ak + IJ

PO[a0,8_{kJ +[ak,}8_{k + IJ}

P"[a a J + P[a ,a

1

+ Q[am,ak + I

T h e o r e m 3: Given two arbitrary edges u

1 and u2 of a connected graph, we can construct an elementary path, which starts with u

1 and finishes with u

2•

Proof: _{I f UI = [ a,x ] and u2 =[b,y], then since the graph is connected, the} vertices a and b can be joined by an elementary path P[a,b]

=

[a, al' a2'

....

ak b].

Again four cases (the required path 1S denoted by P 0):

I. xiP[a,b], yiP[a,b]:

P

0 = [x,a] + P[a,b] + [b,y] II. xtP[a,b], ysP[a,b]:

P

0 = [x,a] + P[a,y] + [y,b] III. xsP[a,b], yiP[a,b]:

P

0 = [a,x] + P[x,b] + [b,y] IV. xsP[a,b], ysP[a,b]:

Po = [a,x] + P[x,y] + [y,b]

T h e o r e m 4: Given two arbitrary edges u.1 and u

2 of a biconnec.ted graph, an elementary circuit exists which contains u

1 and u2 both.

Proof: P[a₀,ak] is an elementary path with u₁ = [a₀,a₁

J

and u₂ = [ak _ ₁,ak]. Such a path exists, as is said by theorem 3. From theorem 2 we know that in such a case there exist two disjoint paths P'[a

0,ak] and P"[a

0,ak] with the properties advertised there.

Let US denote by p the first vertex of P[aO,ak] after ao, which is also in P'[a

0,ak] or in P"[a0,ak] and by q the last vertex b.efore ak with the same properties.

We have three cases this time:

I. p=ak:

II. p

f

ak and thus q

f

a₀; further pEP1

[a

0,ak] and qsP'[a0,akJ· (The case pEP"[a

0,ak] and qEP"[a0,ak] is analogous)., Now we take

P[a₀,p] + P'[p,q] + P[q,ak] + P"[ak,aO]

III. Again p

f

ak and q

f

a₀, hut now pEP'[a

0,ak] and q€P"[a0,ak]. (The case pEP"[a₀,ak] and qEP'[a

0,ak] is analogous). P[a₀,pJ + P'[p,ak] + P[ak,q] + P"[q,a

0J

We have a biconnected graph (G,U). Let H be a subset with IHl~2. We suppose that (G,U) has the following property:

(G,U) has a topological representation (G' ,U') in a plane such that

H

is completely contained in a circuit C' that (of course) divides the rest of the plane into two connected open domains and one of these domains contains no edge of U'.

Such a graph is called H-accessible and the representation (G',U') is called an H-periphere representation. Two elements h

1 and h2 of H are said to be G'-adjacent, if there is a path P[ hj ,h_2J between h'

1 and h' 2 which is on the periphery

_c'

of (G' ,U') and which contains no vertex of H'\{hj,hp.

Theo rem 5: If (G',U') and (G",U") are both H-periphere representations of an H-accessible graph (G,U), then every G'-adjacent pair is also a G"-adjacent pair.

Proof: If IH!s3, then there is nothing to prove. Thus, suppose IHl>3 and that h

1 and h2 (both elements of H) are G'-adjacent and not G"-adjacent. This means that there is a path P'[hi,hz] on C' in which no element of H'\{hj,h_2} appears. P"[hi',h2J is the corresponding path in (G",U") and this path contains at least one edge which is not on C".

Let P"[h" h"J and P"[h" h"J be two disJ"oint paths together covering the

a l' 2 b l' 2 '

whole C". On P~[h1

1

',h2J there must be an h~ not equal to h'₁' or h2· On Pb[h;',hz] there must be an

hb'

which is also unequal to h;' or hz• From the Jordancurves-theorem we know that there is no path from h~ to hb not containing a vertex of P"[h'i,h2J in (G",U"). In (G',U') however, there is clearly a path from h~ to hb which contains no vertex of P'[hi,hiJ • This is a contradiction.

REFERENCES

[l] C.Berge, "Théorie des graphes et ses applications", Paris, Dunod, 1966.

·i

II. ROUTING ALGORITHMS

1. SIMPLE CONNECTION AI.GORITHM ON A GRID

Consider two sets of natural numbers: R = {nlnENjA(O<n~r)} K = {nlnENjA(O<n~k)}

We define the set C as being R~K and we call its elements "cells". On this set we define a relation nccxc in the following way:

V V C [(c., c.)En++(jr.-r.l+lk.-k.I =IJ

c.EC c.E 1. J 1. J 1 1. J

l. J

where c. =(r., k.) and c. = (r., k.). By c.n we mean {cl (c., c)En}. Clearly,

1. l. 1. J J J 1. 1.

n is syuunetric, and it is easy to see that

At the initialization of the socalled "connection"-procedure, we suppose that C is partitioned into two subsets A and B. A is called the set of admissible cells, while B consists of these cells which are "prohibited". Further two elements of A are pointed out: one as being the origin c*, the other as the

** target c

The procedure is a search routine followed by a trace-routine: in the first routine we split A in three sets: P, Q and A\(PuQ); in the second step we select a sequence S of elements of P and Q which are added to B. This sequence

. * **11

is called "the shortest path from c to c •

The procedure is built in such a way that

1. ScA

*

**

2. S = (c₁, c₂, ••. ,cm)-+(c

1=c A c =c ID Ay C.E S [(c., c. 1. 1+ 1)En])

3. For every sequence S' that satisfies 1.1and 2., we have

Is'

l~lsl We must emphasize that the solution need not be unique. In the blocks marked by an asterisk the detetmination of the new ë may give some difficulties. We can meet here two situations:

1. _IPnënl IQnënl 2. _IPncnl !Qnënl =

=

~ ~ 2

"'

...

the procedure can proceed in a unique way.

the procedure needs a rule to decide which cell will be the next ;:;,

1

2

~ f ) ~ )

7

3

For the missing rule in the second case one may take the following one: if possible, do not change the coordinate that was changed in the preceding step;

if possible, make the coordinate that must be changed as low as possible.

The procedure gets stuck in the black marked by two asterisks when this set is empty:this means that no solution exists. (Fig.2.)

As an application of the described procedure we consider the rectangular grid of fig. Ia. The cells are here the little squares of the grid determined by the coordinates at the top and at the left side. The cells belonging to B are shaded.

Let the origin be (I,6) and the target (7,5).

After the first part of the procedure the partition gives the result as given in fig. Ib. The set P consists of the cells containing the character "p" and the set Q is the set of all cells containing the "q".

During the "trace-routine", the second step, we meet only the situation jPnënl = 1 orjQnënl = I, and thus, the solution is unique.

However, when we choose (I,3) instead of (I,6) as the origin, a rule like the one given above is necessary to obtain a unique solution. The results are depicted in fig. Ic.

3

i.,.

₅

₆

₇

₈ 1 2 3 '1 5

6

7

1 p

2

p

3

q

'1

q

s

p

6

1

8 p

9

<i

p

p

9.

q

8

p

_~

f

i!j ·

ia

f

~

ib

1

p

2

3

4

5

6

'1

9

p

p

'i

q

p

Fig. 1 : Example of a routing algorithm on a grid.

p

q

p

q

q

ftj.

c

1.

2. SIMPLE CONNECTION ALGORITHM ON A GRAPH

The connection algorithm on a graph has a more general nature and the procedure, described in the preceding section, must be modified. The main principle,

however, is still the same.

The set C is now equal to the set of vertices G, while the relation n is now the same as the relation

r ..

Again, C is partitioned in to two sets A and B, and an origin and a target are pointed out.

However, the first step splits A in four sets: P, Q, Rand A\(PuQuR).

Again, the blocks marked by an asterisk make uniqueness uncertain. One has to add a "decision-rule" to eliminate this flaw, e.g. when the vertices are

labeled with different integers one may demand that the vertex with the lowest label of all possible vertices is taken. But when the labels were not assigned in a special way, this will be an arbitrary choice.

yes no :::\_:=(c*} o~::A \L

P:=~

yes

,...,.,..__._ _____ *

c::(~C.E.Pnël"l.

ye.$

R ::R\(c.""]

ë:-::c.:+C.<!Rn ê. "'l llt

.-ë.-:

::.-c.-~-< e~Q-n-c.'"""--ri--. R:= R \ (ë

J

3. SIMPLE MULTILAYER CONNECTION ALGORITHM

In the preceding section we generalized the algorithm of section l by admitting an arbitrary relation

n.

In this section we want to generalize not on the relation

n,

but on the number of "layers". Every layer has the same "grid structure". In every layer we have a partition of C into two sets: for layer i f.e. A. and B .. Again, we have in C an origin and a

1. 1.

target. The procedure consists also of a search routine and a trace routine. In the first one C is partitioned into four sets P, Q, Rand T and in the second part the sequence S is selected where Sccx1 (L is the set of "layers",

In the description of the algorithm the following arrays are used to store the sets:

F[l:r, l:k, I:LJ is an array which is not changed during the connection procedure. It is only changed after such a procedure to add the cells of S to the proper B. 's. During the procedure the array F is as follows:

1.

F[i, j, h]

=

X~ ((i, j)) d w z F[i, ], h] ++ (i, j)E~

F[i, ], h]

=

0 ++ (i, j)EBh

The array E[l:r, l:k] keeps track of the partition of C into P, Q, Rand T E[i, j] 0 ++ _{(i' j)ET}

E[i, j] ++ (i, j)EP E[i, j] = 2 ++ _{(i' j)EQ}

E[i, j] 3 ++ _{(i' j)ER}

At the initialization of the procedure all .cells are in T and thus all E[i, j] are zero.

t is an variable, which can take the values 1, 2 and 3. Further we have two "projection"functions: TI

1(c) =

1T2(c) = j The search procedure can be described as follows: Step I: D:= {c * }, E[TI 1(c*), 1T2(c*)J:= 3; t:=3 Step 2: t:= t+l (mod 3) Step 3: DD:=

u

{en} ct::D 3· K[c _JE

=

3· _{1. E} R[c (i' j) J (i, j)]

Step

4:

Step 5: Step 6:

For every c in the set DD we determine whether E[n

1(c), n2(c)] and whether there is an h such that F[n

1(c), n2(c), h] = 1

If both conditions are satisfied, then E[n

1(c), n2(c)]:= t

else DD:= DD\{c} D:= DD

**

If c E D then the search routine is compieted, else go back to step 2.

After the search routine we have some data for the trace routine available, i.e. t, F and E. With these data we can detérmine the sequence S, hut in general this sequence will not be uniquely determined, so that additional decision rules have to be applied.

An example of this procedure is given in fig 4.

3

2

3

1

2

1

2

3

•

1

3

1

2

2

1

3

2

3

1

1

3

1

2 3 4 5 Fl F2 E Fl F2 E Fl F2 E Fl F2 E Fl F2 E l 3 l l 2 0 3 1 0 2 2 l l 2 0 2 3 0 3 l 0 2 0 3 4 0 2 0 0 2 0 3 0 5 l 3 2 3 0 0 2 6 l 3 0 2 0 3 7 0 0 0 0 0 0 0 0 0 8 l 0 t 0 3 2 9 l 0 0 0 3 10 l 0

4. GENEl{J\L IZAT lONS

In the two preceding sections we have generalized the procedure of section in two different ways. In section 2 the n-relation became unrestricted (except for finiteness, of course); in section 3 we introduced a multilayer procedure. Another possibility is to allow for a more complex optimality criterion. The criterion was up to now "the shortest path between the origin and the target", where '_shortest meant: "passing through a minimum number of cells" • One could solve the problem also by assigning "cell masses" inste.ad of partitioning into sets P, Q, (R) and D. The "cell mass" of c is in such a case the smallest number of cells one has to pass through before reaching c started in c*. By allowing amore "general cell mass" one may think to have improved the procedure greatly. One can take for example as a "cell mass" a weighed sum of penalties:

f(c)

=

.E

1a. f.(c)

i= l. l.

f.(c) are the penalty functions, f.e. the number of cells one has to pass

l.

through to reach c from c*, the number of crossings one has met, etc •• Two complications are then introduced. Firstly, our strategy has to be changed (one must assign "cell masses" only to those cells that obtain the lowest possible mass, which means that one has to remember all neighbour cells which didn't get a mass) and secondly, the penalty function has to satisfy special conditions (the minimum corner problem is not solvable by this algorithm). We will give the description of the algorithm, and then these difficulties will be apparent.

The model

b b is symbol 'prohibition symbol'

Nl

0 Nl0 is the set of nonnegative integers

c

S' C is a finite set S' is a finite set cns' = 4> bES1 'set of cells' 'cell -alphabet' S S = S'\{b} n a µ A p p* p c' c ncCXC ~V CV 1 C[(c,c)in A ((c,c 1_{)En++ (c}1_,c)En)J CE C E 'neighbourhoods-relation' crc;.cxs'

VcEC a!sES' [(c,s)Ecr] µcNI xsxNI

0 0

V(n,s)ENj xsa !mENj [(n,s,m)t:µ]

0 0

'labeling relation'

'weighing relation'

VnENI VsES VmENj [(n,s,m)Eµ+n::;m]

0 0

V _nEN 1 V _n'EN 1 V _sES [n~n' + (n,s)µ~(n' ,s)µ]

0 0 AsC V [cEA ++ (c,b)icr] CEC c p =

u

ei

i=l

'set of admissible cells'

P*={(c

1,c2, ••• ,c) j(cn 1,c2, ••• ,c )EPAc EAAVn n 1<. _i<n [c.EAA(c.,c.+l)En 1 1 1 A

'set of paths' óc p*xNI o ] 'cell-mass relation' V A V Nj [((c),n)Eó+n=o CE UE 0 V( ) p*[((c

1,c2, ••• ,c ),m)EÓ++((c1,c2,,,,,c _1)o,c cr,m)Eµ]

c

1,c2, ••• cn E n n n

Ih~_E!:~!?1~~

*

**

Given: c EA, c EA

Asked: Find a pE Pee:* such thatvpE pC** [((p,m )E·óA(p!m)di)+m sm]

* * * 1. L:={c },L' :=1":=1:=0, f(c ) :='l(c ) :='l:=O, VcEC\{c*}[f(c) :='l(c) :=00_] 2. 'l:='l+l 3. 4. V V, 1[c'Ecn+(f(c'),ca)µ:EI] CEL' c E 5. m :+(m EIA

la

[m<m ]) o o mEI o

6. VCEL'[ 3: 1 L[(f(c'),ea,m )e:µ]+ (f(c):=m Ae:e:L"A'l(c):='l)J

c e:cnn o o

7. L:=(LuL")\{c!cEAA V, [f(e')f00Ve'a=b]} e Een ** 8. 1=0 + Pc* =0 e ** 9. if f(c )=00 then goto 2. ** "' ** 10. p:=(c ), c:=e

"'

-

-ll. e:+ ((e,e)EnA V "'['l(c)~'l(c)]) cEen 12. p:=(c,p)T

"'

13. e:=c • "'.L

*

14. if ere then goto JO.

Remark: Te AxPxP

*

(p~P Ap=(c

REFERENCES

[1] C.Y.Lee,"An Algorithm for Path Connections and lts Applications", IRE Transactions on Electronic Computers, EC-10, pp.346-365, September 1961 .

[2] S.B.Akers,Jr, "a Modification of Lee's Path Connection Algorithm", IEEE Transactions on Electronic Computers, EC-16, pp.97-98,

III.THE MATHEMATICAL FORMULATION OF THE WIRING PROBLEM 1 • INTRODUCTION

The wiring problem which occurs in the design of printed boards and integrated circuits, arises from the restriction of the number of wiring layers. In many cases this number will be one. The problem is usually translated into a graph-theoretical formulation [l, 2, 3] in such a way that a certain graph has to be tested for planarity. When the result of such a test is negative, technica! modifications should be applied in order to obtain a planar graph.

Besides the one layer constraint there are other requirements. They are listed below.

c

₁

: The terminals of the circuit are to be placed on the periphery

of the chip or the board.

The connection of the printed board with the other parts of the system is simplified by satisfying this requirement. In the case of circuit integration the same applies for the bondation of the circuit to its package, but here we have the additional advantage of keeping the bonding pads out of the region in whic.h the elements are placed (thermal effects).

c

₂

: The terminals are to be positioned on the periphery in a previously

specified sequence.

This constraint is dictated by standardization rules and the desire to avoid special precautions for isolation.

With Cl and C

2 a practical layout algorithm for integrated circuits l.S possible. The formulation for printed boards, however, is not complete. It should be

extended by the following three constraints (C

3 ,

c

4,

c

5).

c

₃

: The contacts of a certain component must appear in a given

sequence.

As to its treatment this constraint is equivalent to a combination of

c

1 and

c

₂• Components with more than three pins in a fixed order make the implementation of

c

3 necessary. However, in order to match the pins of the components to the contacts on the board, the sequence of the contacts has to have a specific orientation, namely clockwise or counterclockwise. Therefore we introduce the following constraint.

(,'.J: '!'l1c· or•i'.enla./,t'.on

ar

llw conla.cls on ûw board must be the same j'or a.ll llw components with more than tUJo pins in a ['ixed order.

The last requirement makes an a priori choice of the side on which the components are to be placed, possible:

c

_{5: The orientation of the corrrponents described in}

c

₄

is defined with

respect to the orientation of the terminal sequence at the periphery.

In order to adapt our notions to those in literature we will start section 2 with some definitions and statements whose proofs are either trivial or to be found in hooks on graph theory and analytic topology [4, 5, 6] • Section 2 ends with the statement and the proofs of the five crucial theorems necessary for the justification of the mathematical formulation of the problem with the above-mentioned five constraints. This formulation is described in section 3, and in section 4 an example is presented for printed board layout. The last section contains some concluding remarks.

2. THE GRAPHTHEORETICAL BASE

A graph (G, U) consists of a finite set of vertices G and a finite family of edges U such that GnU

=

~. G and U define an incidence relation which associates with each edge [x, y] two vertices, x and y, called its ends. Parallel edges are associated with the same pair of vertices. A loop is an edge of which the associated vertices are not distinct. The number of edges incident with vertex x is called the degree y(x) of x. We call a graph simple, when there are no vertices of degree less than 3, no parallel edges and no loops. With every graph we associate a simple graph by applying the following rules as many times as possible:

1. Delete a loop

2. Delete a vertex of degree l with its incident edge

3. Replace two parallel edges by one edge in such a way that every pair of vertices which was associated with an edge remains so

4. Replace a vertex of degree 2 and the two edges incident with it by one edge in such a way that the degree of the other vertices is not changed.

A path P[x₁, yk] is a sequence Cx

1, y 1], Cx2, y 2

J, . . • .

[~, yk] of edges in which we have

x. +-+ 1

J j) A (y. 1

A circuit is a path with x

1

=

yk. A graph is called connected, when there is a path between every pair of vertices. The maximal connected subgraphs of a graph are called components. The intersection of two graphs consists of all the

edges they have in common and their associated vertices. The union of two graphs is the graph consisting of all the edges and vertices of the original graphs. Two graphs are said to meet each other, if they have an edge in common. Otherwise they are called disjoint. The complement of a subgraph (H, V) in the graph

(G, U) is the graph consisting of all the edges in U\V and all their associated vertices, denoted by G1H. The set Hn(G1H) is called the attachment set of

(H, V). The number of elements in this set is called the attachment number.

Let (C, W) be a circuit of~. U). We call a subgraph (H, V) of (G1C, U\W) C-bounded, when all its vertices of attachment are vertices of C. It is clear that (G1C, U\W), the complement of any C-bounded subgraph in (G7C, U\W), and the intersection of any two C-bounded subgraphs, are all C-bounded. A C-bounded subgraph of (G1C, U\W) is called a bridge of (C, W) if none of the subgraphs of this graph is C-bounded. In other words a bridge of (C, W) is a minimal C-bounded subgraph of (G7C, U\W). When [x, y]EU\W, then the intersection of all the

C-bounded subgraphs of (G1C, U\W) containing [x, y], is a bridge. (G1C, U\W) is thus the union of all the bridges of(C, W). Clearly, a bridge is connected, because it is minimal [7].

A graph is called n-separable, where n is a non-negative integer, when it can be partitioned into two disjoint subgraphs, each having at least one vertex which is not a vertex of the other, such that the attachment number is ·not more than n. A graph is properly n-separable, when its simple graph is n-separable. The graph is n-connected when it is not properly m-separable for any m<n. An articulation set is a set of n vertices being the vertices of attachment of a subgraph of an n-separable and n-connected graph. In a 2-connected graph a

circuit can be found such that it contains an arbitrary edge (or vertex) [7, 8, 9].

A graph is called planar, when it has a topological representation in a plane (or equivalently on a sphere). This definition is the link between graph theory and analytic topology. For the details we refer to the literature [4, 5, 6].

Here we confine ourselves to some facts from these areas.

A graph is planar if and only if its simple graph is planar. Further, every subgraph of a planar graph is planar. The most famous criterion for the

planarity of a graph is due to Kuratowski

[IO]: A

graph is planar if and only if it has no subgraphs whose simple graphs are isomorphic to({x .• J$i$5},

l.

{[x., x.JI l$i$5Ai<j$5}) or ({x. ll$i$6}, {[x., x.JI l$i$3A4$j$6}).

i J i i J

A planar 2-connected graph (G, U) is called H-accessible where H c G, when there exists a circuit (C, W) in (G, U) such that H c C and there is a planar

representation (G', U') of (G, U) in which every point of c'uW' can be connected with a point xtG'uU' by disjoint Jordan curves without intersecting G'uU'.

(G', U') is called an H-periphere representation of (G, U). It is clear that one of the regions in which C'uW' divides the plane, contains no edges of U'. We call this region a face in this particular representation. The circuit C'uW' forms the boundary of this face. Two elements h

1 and h2 of Hare called G'-adjacent in H when they can be connected by a Jordan curve in this face without intersecting other Jordan curves in this face connecting two elements of R. The notation for this relation will be: h

₁

~h

₂

• Every planar representation automatically defines an adjacency relation on H, when it is H-periphere. In a planar representation every vertex and every edge is on the .boundary of some face. The whole graph is contained in the interior region of one of the boundaries. This boundary is called the outer boundary. For every face there can be found

a planar representation on a plane such that its boundary is the outer boundary. Suppose namely that the graph is mapped onto the surface of a sphere. Call an arbitrary point of the face in question the north pole P. Stereographic projection from P on the tangent plane through the south pole will project the north pole on the infinite of the plane and the projection of the face concerned will form the outer region of the plane.

Suppos.e we have a simple closed Jordan curve C (dividing the plane into two regions; Jordan curve theorem) on which two pairs of distinct points c

1,

c

2 and

c

3, c4 are selected (C1

#

c

2 and

c

3

#

c4). These pairs are said to alternate when there is no section of C connecting

c

1 with

c

2 without containing

c

3 or c

4. It is possible to connect

c

1 with

c

2 and

c

3 with

c

4 by disjoint Jordan curves in one region if and only if

(c

1,

c

2) and

ç

3,

c

4)do not alternate [6].

An equivalent definition of G'-adjacent in H is now: two vertices h₁ and h₂ of H are G'-adjacent in H if they do not alternate with any other pair of vertices of H on C'uW'.

From now on in this section (G, U) is a 2-connected graph. In the case of 1-connectedness }he accord ing statements are easy to1 _det~ve

from the results below. Only theorem 3 undergoes a slight modification.

Theorem 1: H. _1, c G , x. ,/ _1, G

'uv,

F-(G, U) has a planar representation (Gr:i V') that 1,S Hi-periphere for l$i$m i f and onZy i f the graph

) ' ( m { } m { [ hi] 1 hiEH.}))

(K, V

=

(Gu u. x. ) , Vu ( .u x .,

i=l 1, 1,=1 1, 1, is pZanar for some {x

1, x2 ••• xm}

Proof: Suppose (K, V) is planar, then it has a planar representation (K', V') We consider a face with x. on its boundary.

. 1 .

with elements of Hi' h~.and h~ boundary consists of [h 2 1 , x.], • . 1 must also be i [xi' h₁J and

Since x. is only connected

1.

on this boundary. Thus the

P

₁

[h~, h~].

None of the pairs 1 1

(xi'.Y) ~here yEP₁Ch₁, h

2J, are mutually alternating, so every point of

P

₁

[h~, h~] can be connected with xi by a Jordan curve in the face without

meeting one of the other connecting curves. The same applies for the

. i i i i

points ~f P

2Ch2, h3

J,

P3[h3, h4J, etc. The curves connecting the points of P.[h:,

h7

1

J

with x. are in another face as the curves belonging to

J· J . J+ 1 •

Pk

[h~, h~+l]

(k

1

j). The Jordan curves [hj , xi] are disjoint from each

other because (K', V') is a planar representation, and disjoint from the constructed curves, because they are on the boundary of the faces.

i i i i

So we conclude that every point of the circuit P

1Ch1, h2JuP2Ch2, h3Ju

uPk[h~, h~]uH.

can be connected with the point xi by disjoint Jordan curves. This means that

(K'\(~=1

{xi}),

V'\(~=l{[xi'

of (G, U) for all l$i$m.

hi]\hiEHi})) is a H.-periphere representation

1.

Conversely, when (G, U) for }$ i $ m, then every disjoint Jordan curves,

has

1.

a planar representation which is H.-periphere

1.

h EH.

1. can be connected to an x. with mutually 1.

and without intersecting any edge. We only have to consider the points x. as new vertices, and the connecting Jordan

1.

curves as new edges, and we have a planar representation of

m m i i

(Gu(u {x.}), Uu(u {[x., h Jlh EH.}))

Theorem 2:

HcG, x/G

(G, U) has an H-periphere representation (G', U') with the property "1~i<k [hi'Vhi+l]

if

and only

if

(K, VJ

=

(G u {x}, Uu{[x,h] lhEH}u{[h 1,hk]}u{[hi,hi+l] 1 l~i<k}) is planar.

Proof: For IHl~3 the theorem reduces to theorem 1. So we suppose !Hl~4. For the first part of the proof we start from the planar H-periphere representation (G', U') with the proposed properties. We can connect .hi with hi+I and h

1 with ~by disjoint Jordan curves in the face with H on its boundary. The new edges form together a circuit containing H completely and being the boundary of a new face. The new represented graph is thus H-periphere. From theorem 1 we know that the graph (K, V) is planar.

Now we suppose we have anH-periphere representation (G', U') but with a wrong adjacency relation on H. This means that there is a subset

{ha' hb' he' hd} of H with a<b<c<d and ha'Vhc and hb'Vhd in {ha,hb,hc,hd}. Further, we suppose that (K, V) is planar, and thus we have a planar representation of

(M, W)

=

(G, Uu{[h

1, hk]}u{[hi,hi+IJI l~i<k})

since this is a subgraph of (K', V'). From the first part of this proof we also know that this representation is still H-periphere with the same adjacency relation.

From theorem 1 and the first part of this proof we conclude that the graph (Mu{x}, Wu{[ha,hc]' [hb,hd], [ha,x], [hb,x], [hc,x], [hd,x]})

must also be planar.

However this graph contains the subgraph

(Hu{x}, {[ha,x], [hb,x], [hc,x], [hd,x], [ha,hc]' [hb,hd], [h 1,hk]}u u{[hi,hi+l]Jl~i<k})

whose simple graph is isomorphic to one of the graphs in the theorem of Kuratowski. So (K, V) cannot be planar, which implies a contradiction.

'f'/11 ·nr•1 ·m •'· Wli1'n o :;r·ar1'1 ((;, _IJ) i'.c fl-auec:rniJ;l,c, lhrY'e _1,:; only one

ad.jaeency

r><'laf (,m 011 Il f!o::::(/J/.e.

Proof: Again we suppose that IHl~4.

Since (G, U) is H-accessible it has an H-periphere representation (G', U'). Suppose it has another H-periphere representation (G", U") such that there . is a pair h

1, h2 in H, which is G'-adjacent and not G"-adjacent. This means there is a path P'[h

1,h2

J

in (C', W') in which there is no element of H\{h

1,h2}. P"[h1,h2

J

is the corresponding path in (G", U"), and this path contains at least one edge not in (C", W"). Let P~[h

₁

,h

₂

J and Pb[h

1,h2

J

be two disjoint paths, together covering the whole (C", W"). On P~[h

₁

,h

₂

J there must be an haEH and not equal to h

1 or h2, and on Pb[h₁,h₂J there must be an hbEH, not equal to h

1 or h2• In (G', U')we can easily find a path P'[ha,hb] not containing a vertex of P'[h

1,h2

J

(forexamplein (C'uW,\P'[h

1,h2]).However, in (G", U") there is not such a path, since ha•1\, and h₁,h₂ are alternating on C"uW".

Theorem 4:

A planar graph (G, U) is properly 2-separable if and only if there

is at least one face boundary in an arbitrary planar representation

of its simple graph which has more than one bridge.

Proof: There is a planar representation of the simple graph of (G, U). Suppose one of the face boundaries has more than one bridge. Bridges are connected. thus attachment vertices of a bridge B cannot alternate with vertices of attachment of another bridge B'. So all the vertices of attachment of Bare on a path P[c

1,c2

J

of the boundary and none of the attachment vertices of B' is. Then the graph is separated by c

1 and c2•

Conversely let the planar graph (G, U) be properly 2-separable with articulation set {c

1,c2}.Then separate the graph at c1 and c2• We have now two components: (Hj, Uj) and (H2, U2)· Since c₁ and c₂ are connected

in (HZ' Uz), (Hj, Ui) must be {c₁,c₂}-periphere (apply theorem after choosing an arbitrary point on a path

r

₂Cc₁,c₂

J

in (H2, U2)), so we can connect c

1 and c2 by a Jordan curve in the new face. The same is possible in (Hz, Uz). After identifying [c

1,c2

J

in both components we have a Jordan curve between c

1 and c2 in (G', U') and from theorem 1 we know that c₁ and c

2 must be on the same boundary (C',W').(This fact is obvious from a picture, but as many theorems of analytical topology hard to prove).

The theorem is usually referred to as the Jordan-SchÖnflies theorem [6]) Since the graph(G, U) was properly 2-separable, there must be

a vertex not in C in H

1 as well in H2• This means that (H1, C, U 1 \W) and (H

2

1c, u

2\W) contain each at least one bridge of (C, W), since they are not empty.

Theorem 5: A graph (G, U) has a umque planar representation (i.e. the

boundaries of the faces consist of the same edges for every planar representation of (G, U)) i f and only i f (G, U) is planar and not properly 2-separable ([11, 12]),

Proof: The necessity is easy to see., for one can, without spoiling the planarity, obtain the nrlrror -image of every subgraph with attachment number two, by twisting it around its attachment vertices.

The sufficiency follows from theorem 4:

Suppose we have two planar representations(G', U') and (G", U") of (G, U). (C', W') is the boundary of a face in (G', U')and (C", W"), the corresponding circuit in (G", U"), is not the boundary of a face. In (G", U"), (C", W") must contain inner and outer bridges, so at least two bridges. Thus the

corresponding circuit in (G', U'), (C', W') must also have at least two bridges. Since (C', W') was the boundary of a face. The graph (G, U) must be properly 2-separable.

3. THE MATHEMATICAL FORMULATION

In this section we want· to construct a graph from a given network and some additional design data (constraints) such that it is suitable for a number of tests which are necessary and sufficient to yield

cl

to

es,

and a practical implementation on a computer is possible. In the case of integrated circuits where

c4

and

es

have lost their relevance a planarity test proves to be

efficient. However, with printed board layout we have chosen for a combination of two tests, a planarity test followed by a connectivity test. Of course it will be advantageous that the output of the first test is adapted to the other. We will carne back to these subjects in section S.

The starting point is the schematic diagram of the network consisting of components artd conductive interconnections. In the set of components we distinguish between components that can be crossed by wires and those that cannot be crossed.

Resistors on a printed board are usually big enough to allowfor one or more crossings, In IC-technology a diffusion resistor of more than l k~ can also be crossed without difficulty. These components belong to the first set. A transistor is an example of the second kind of components. lts contacts are toa close to each other to permit a crossing (In IC-technology the distance between the contacts is sometimes big enough, hut here we want to avoid crossings too, since parasitic capacitors are introduced then). With every component of the

second kind we associate a vertex in the graph to be constructed. We refer to such a vertex as a c-vertex. The conductive interconnections in the diagram form a set of "trees". These trees can never be crossed without special measures ("jumpers" for printed boards, "cross-under resistors" for IC's). With every conductive tree we associate a vertex, called a t-vertex. Whenever a component belonging to a c-vertex c of the graph has one of its contacts on a conductive tree associated with t-vertex t we connect c with t by an edge [c,t], Note thatthe graph so

constructed is bipartite. This means that the set of vertices can be partitioned into two subsets, such that every edge of the graph connects a vertex of one subset with a vertex of the other.

Remarik:Some components with a special shape (f .e. IC with a "dual in line"-package) should be implemented in a special way.

The graph generated by the described procedure is called the potential graph. We assert that, when the potential graph is planar, then there exists a planar wiring and a non-overlapping component placement. It is easy to get a layout with these properties by "growing" the c-vertices until they have reached the size of their components. The wiring between the components is (for example) the rest of the graph. Of course this is not a practical layout. In one of the subsequent stages of the program one has to minimize the chip area or to place everything on a board (mostly with standardized dimensions). These procedures are not the subject of this paper.

After the construction of the potential graph we have to implement

c

1 to

c

5• The treatment of the first constraint is innnediately clear from theorem 1. There are several conductive trees which contain terminals. The set of vertices H is the set of their t-vertices. What in fact we want to know naw is whether the graph is H-accessible. We therefore connect every vertex in H with a new vertex x. (The graph is still bipartite; we consider the vertex x as a c-vertex). Planarity of the graph thus obtained is necessary and sufficient for the

The introduction of

c

₂ seems to be obvious from theorem 2. Acting in the sense of this theorem we connect every pair of "adjacent" terminals by a new "adj.:icency edge" (bipartiteness is preserved by laying a vertex on every new edge; these vertices can be considered as c-vertices). The potential graph is naw extended by a so-called wheel (the "terminal wheel" in this particular case): the

adjacency edges form together the "rim" of the wheel, x is called the "hub" and the edges incident with x are called the "spokes". Planarity of the obtained graph is necessary and sufficient for a planar potential graph constrained by

c

₁ and

c

₂• However, theorem 3 makes the usefulness of the implementation of

c

2 questionable. (We will explain this in section 5). Nevertheless we maintain the addition of the adjacency edges, because most planarity tests yield directives as to the set of edges whose deletion planarizes the graph and then the adjacency edges may be useful. Besides the implementation of

c

4 becomes easier as we will see later in this section.

c

₃ is treated in an analogous manner. Here the hub is the c-vertex associated with the respective component. The set H is formed by the t-vertices directly connected with the hub. We only have to add new edges between adjacent contacts, and again a complete wheel is introduced. We can make the same remarks on the introduction of

c

3 as we did with

c

2• The graph so obtained is called the extended potential graph.

The question now is, whether this graph is planar or not. In case of planarity a layout constrained by

c

1,

c

2 and (eventually)

c

3 exists. Otherwise the graph should be modified by using possibilities given by the technology until planarity is obtained. The problem which is left now can be formulated as: "Does a planar representation of the (eventually modified) graph exist in which

c

4 and CS are satisfied?".This is very unlikely to occur, and thus in most cases modifications should be carried out. It is innnediately clear that methods searching all planar representations(f.e. by applying the theory described in [12], [16] or [17]) are not recommendable. Firstly because of the computational effort involved, and secondly because we don't obtain any indication for executing the necessary modifications. The next thought can be to invalidate these objections by using a "constructive" planarity test. By constructive we mean that the starting point is a planar subgraph which is extended until the graph at hand is obtained.

The extension-steps consist of transformations, which do not spoil the planarity and take the orientations into account. Nevertheless we prefer a connectivity test

(subsequent to the planarity test) on a planar representation of the (eventually modified) extended potential graph which accounts for

c

4 and CS. The reason for this choice will be given in section S. The connectivity test implies a partitioning of the graph into maximal not properly 2-separable subgraphs. Before executing the test we add the three adjacencv edges of each component with three pins whose orientation has to be considered. They may not

have been insertecl into the extended potential graph, since they are not essential for the sequence of the contacts (it always is the same in the case of three contacts) and they may complicate the modification steps.

Yet, in the connectivity test, these edges are important, because the graph has to be subjected to a simplification procedure in which a c-vertex associated with an orientated three-pin-component may disappear.

Furthermore, wheels are clearly not properly 2-separable. This means that its hub cannot be in an articulation set with less than three elements. Thus wheels will not be split apart by the connectivity test procedure.

According to theorem 5 the subgraphs generated by the test have unique planar representations. So the orientations of the components in such a subgraph are fixed with respect to each other. Consequently, a necessary condition for satisfying

c

4 is that the orientations of the components in such a subgraph are all clockwise or all counterclockwise. This is also sufficient, because some subgraph with all its wheels oriented in the same way may be adjusted with respect to the orientation in another subgraph by twisting it aroun.d its articulation points.

The orientation of the "terminal wheel" referred to in constraint

c

5, can easily be incorporated into the procedure.to check

c

4• 4. EXAMPLE

In this section the described method is demonstrated with a printed board layout design.

The circuit diagram is given in figure 1 (voltage stabilizer). The components are numbered (1) up to (12) inclusively, and the conductive trees 13 up to 23 inclusively. The constraints are specified as fellows:

c

1: The terminals 13, 14, 15 and 16 are to be placed on the periphery of the board.

c

2: The following sequentia! position of the terminals around the periphery is required: 13, 14, 15, 16.

c

3: The contacts of component (1) (the operational amplifier) must appear in the following sequence: 16, 19, 13, 21, 20, 14.

c

4: The orientation of the components (1), (3), (4) and (9) has to be the same: when walking along the rim of the respective wheels in clockwise direction the hub has to be in the region at the right. The t-vertices on the rims

then have to occur in the following sequence: a) for the operational amplifier ((1)):

16' 19' 13, 21, 20, 14

b) for the transistors ((3) respectively (4)) (3): _{15' 23, 16} (emitter-base-collector) (4): _{16' 20, 23} (idem)

c) for the potentiometer ((9)): 17, 18, 19

es:

When walking along the rim of the "terminal wheel" in the sequence 13, 16, 15, 14, the hub has to be at the right.

The potential graph can easily be constructed by connecting the c-vertices ((1)-(12)) with the t-vertices (13-23) according to the schematic diagram of figure 1. For the moment we consider all the components to be non-crossable.

If necessary all the components may be crossed except the transistors, operational amplÜier, and the potentiometer. (The op-amp has a T0-5-TYPE package; see

bottomview).

We take care of constraint

c

1 and

c

2 by adding a new vertex ((24); c-vertex) and adding the edges [24, 13], [24, 14], [24, 15], [24, 16] and the edges [13, 14], [14, 15], [15, 16], [16, 13].

The treatment of

c

3 requires the addition of the edges [16, 19], [19, 13], [13, 21], [21, 20], [20, 14], [14, 16]. The graph obtained now, is the extended potential graph and has to be tested on planarity. The test discloses the

extended potential graph to be non-planar. Planarity can be obtained by deleting two edges. A possible choice can be:

a) edge [4, 20] (the base of transistor (4)); Technologically this connection can be established as a"jumper".

b) One of the edges [14, 10] and [10, 18]; In this case, the modification is simple, si.nee vertex (10) is associated with a component (resistor) that may be crossed.

Since the planar representation in figure 2 does not satisfy the constraints

c

₄ and

c

5, the connectivity test has to be executed.

The starting point for this test is the extended potential graph (figure 2, without dotted lines) with addition of all the "adjacency edges" of each

3-pin-component whose orientation has to be considered. The first thing to do is simplifying this graph. The result is depicted in figure 3.

- 19 - 13 17 - 13 - 19 16 - 13 - 18 - 19 16 - 14 - 15 - 23 16 3 15 16 - 15 - 24

articulation points 13 and 19

articulation points 15 and 16

Faces with two vertices in common are grouped together and enclose a maximal subgraph of the simple graph, that is not properly 2-separable. The orientations of the components that are placed in the same subgraph, are fixed. If these relative orientations are not according to the constraints

c

4 and

c

5, some additional modifications have to be carried out to satisfy the constraints. If the (relative) orientations of the components in distinct subgraphs are not according to the constraints, then the orientations in some subgraph may be changed by twisting the subgraph around its eventual articulation points. In our case we have 3 maximal subgraphs that are not properly 2-separable:

a) ({13, 17, 19, 18, 9}, {[13, 17], [17, 19], [18, 19], [13, 18], [9, 17],

[9, 18], [9, 19]}).

This subgraph contains the wheel associated with the potentiometer (9).

b) ({16, 23, 15, 3}, {[16, 23], [23, 15], [3, 15], [3, 23]}).

This subgraph contains the wheel associated with transistor (3).

c) The subgraph containing all the edges of the graph in question except those edges that are contained in the graphs a) and b).

This subgraph contains two wheels, namely the terminal-wheel (hub 24) and the wheel associated with the operational amplifier (1).

The orientation of transistor (4) is of course always ensured since one of its pins is connected with a jumper. The relative orientation of the two wheels in c) is according to the constraints, so no additional modifications have to be carried out. The subgraphs a) and b) have to be rotated to get the planar representation of the graph as given in figure 4. From this graph it is easy to construct the planar representation of the modified potential graph that satisfies the given constraints. ·