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High speed wavelength conversion in a heterogeneously

integrated disc laser over silicon on insulator for network on a

chip applications

Citation for published version (APA):

Raz, O., Liu, L., Thourhout, Van, D., Rojo-Romeo, P., Fédéli, J-M., & Dorren, H. J. S. (2009). High speed

wavelength conversion in a heterogeneously integrated disc laser over silicon on insulator for network on a chip

applications. In Proceedings of the 35th European Conference on Optical Communication (ECOC 2009) 20 - 24

September 2009, Vienna (pp. 4.2.3-1/2). Institute of Electrical and Electronics Engineers.

Document status and date:

Published: 01/01/2009

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High Speed Wavelength Conversion in a Heterogeneously Integrated

Disc Laser Over Silicon On Insulator for Network on a Chip Applications

O. Raz(1), L. Liu(2), D. Van Thourhout (2), P. Rojo-Romeo(3), J.M. Fédéli(4), H.J.S. Dorren (1)

(1)

Eindhoven University of Technology, Den Dolech 2, 5600MB, Eindhoven, The Netherlands (o.raz@tue.nl)

(2)

INTEC, Ghent University—IMEC, St-Pietersnieuwstraat 41, 9000 Ghent, Belgium

(3)

Institut des Nanotechnologies de Lyon INL-UMR5270, CNRS, Ecole Centrale de Lyon, Ecully F-69134, France

(4)

CEA-LETI, Minatec 17 rue des Martyrs, 308054 Grenoble, France

Abstract We present the first BER results for wavelength conversion at 2.5Gb/s for an InP membrane

Micro-Disc-Laser bonded on SOI substrate. Measured BER supports error-free operation when FEC is used. Operation at 10GB/s is also demonstrated.

Introduction

Current trend in CPU development is the switch from clock speed driven performance enhancement to a core multiplication driven one, mostly because of the ever growing gap between single CPU speeds and memory speeds1. One of the challenges of multi core CPUs is the need to maintain high speed communication links between these processing units. A possible solution to the problem is the use of a photonic cross connect layer on top of the CMOS chip, or in close proximity, to handle communication between the cores. Such a photonic system is sometimes referred to as network on a chip2.

The envisioned networks on a chip should be able to allow for low loss light propagation, light generation, modulation and detection and perhaps some higher level functionality such as Wavelength Conversion (WC). The sub components should have the smallest foot-print possible and desirable low electrical and optical power consumption. In that respect Micro Disc Lasers (MDL’s) are a most suitable candidate for a light source as their typical foot print and power consumption are 10-100 times smaller than that of a competing DFB structure or SOA. When such InP membrane MDLs, and other membrane structures, are bonded on top of a Silicon on Insulator (SOI) substrate, most if not all of the above mentioned requirements are satisfied and resulting power consumption is very low3. However the low power consumption also means that power output from such devices (and especially fiber coupled power) is very low, limiting estimation of error rate performance and maximum speed4. This problem worsens with increasing bit rate as photo receivers become less sensitive.

In this paper we present for the first time BER results of wavelength conversion based on mode locking in an InP MDL bonded on top of an SOI waveguide layer. We investigate the performance of the MDL at 2.5Gb/s and 10Gb/s.

At a modulation speed of 2.5Gb/s, WC is demonstrated with an assisting seed laser, to allow faster recovery of the MDL’s free running lasing mode. BER measurements were taken, and we found a BER low enough to support error free operation if Forward Error Correction (FEC) is employed.

Additionally, using a high speed sampling scope, a sequence of 100,000 bits was sampled and numerically compared to a PRBS sequence with zero mismatches. At 10Gb/s insufficient OSNR prevented error ratio estimation, but time traces of the MDL’s output under modulated injection at 10Gb/s show clear inverted pattern.

Experimental Set-up and Methodology

The experimental set-up is shown in figure 1.

The pump signal in a tunable laser source tuned to the non-dominant lasing mode of the MDL (separated by 32nm). It is modulated by a PRBS generator at 2.5Gb/s using an MZM and launched to the MDL through a circulator.

From the other side of the disc a second tunable laser is tuned to the dominant lasing mode under free running operation. The light at the circulator’s output is then amplified using an EDFA as a pre-amp and an SOA as a booster to bring it to around 3dBm required for proper detection with the oscilloscope. The 2nd tunable laser is needed in order to speed up the recovery of the MDL to its free running state, once the injection is turned off. Without it, the MDL’s recovery will be slower as it will rebuild from spontaneously generated photons, while with the aid of the external weak seed, at the original lasing mode, signal recovery is much faster. Figure 2 compares a PRBS sequence at the MDL output with and without the extra tunable laser. It is clear that without the 2nd tunable laser, isolated zeros in the input pump are not fully transformed into ones at the MDL output. The device used was a 7.5μ meter wide InP disc laser lithographically etched in a 1 micron thick membrane

Fig. 1: Experimental set up

ECOC 2009, 20-24 September, 2009, Vienna, Austria Paper 4.2.3

978-3-8007-3173-2 © VDE VERLAG GMBH

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bonded on top of an SOI waveguide circuit. The disc was temperature controlled to work at 10oC and biased at 3.81mAmps (1.65volt, 0.7mAmp threshold). Gratings at the end of the silicon waveguides allowed for coupling of light into and out of the chip (with an estimated 8-10dB loss). The two tunable lasers were tuned to the suppressed lasing mode (pump @ 1600.68nm) and the free running mode (assist @ 1568.985nm) with an estimated -10dBm (modulated) & -20dBm (CW) power levels in the silicon circuit respectively.

Results

The pump was first modulated at a speed of 2.5Gb/s and as seen in figure 2, an inverted 27-1 PRBS was obtained at the output. Using an APD receiver BER curves for Back to Back and MDL’s output were taken and are shown in figure 3.

Due to the very weak output power of the disc (<1μWatt), OSNR at the EDFA’s output was below 10dB, leading to a clear noise floor at a BER of 104. While the obtained values are quite low, FEC can deliver the required gain to insure error free. To further investigate the performance of the MDL as a WC a sequence of 105 bits was captured with the sampling scope and analyzed using MATLAB offline.

The code compared the recovered data bits, with a numerically generated PRBS sequence, time aligned to the sampled data. At the optimum sampling point the recovered value was compared to a pre-assigned threshold and the corresponding bit was compared with the PRBS sequence. For the 100,000 bits sampled, a threshold value was found such that all bits were recovered successfully – giving error free operation.

Next we switched the data source to 10GB/s and inserted a simple 26 bit pattern (shown at the top of figure 4). The recovered pattern at the output of the MDL is shown to be, as expected, the inverted bit sequence (bottom of figure 4). Inverted pattern at the MDL output is readily observable, as well as oscillations on both the one and zero levels, probably due to carrier relaxation oscillations. The obtained extinction ratio and OSNR were insufficient in order to attempt a numerical estimation of BER performance.

Conclusions

The promise of an integrable WC based on a bonded InP MDL on top of SOI substrate is further supported by 1st BER measurements at 2.5Gb/s and patterning of the MDL’s free running mode with an inverted copy of the pump signal at 10Gb/s. The low output power of the MDL resulted in a clear error floor, which can be overcome with the use of proper error correction codes. In order to obtain error free operation without FEC at 2.5 and perhaps 10Gb/s, the fiber coupled output power for these devices must be increased by 5-8dB so that some of the amplifiers and filters can be removed.

Acknowledgements

This work was supported by the EU-funded FP7 ICT Project – HISTORIC.

References

1. W. A. Wulf et al, Computer Architecture News, 23(1) pp. 20-24, 1995

2. K. Bergman et al, proceedings of photonics in switching 2008

3. G. Roelkens et al, proceedings of photonics in switching 2008

4. Liu Liu et al, proceedings of the ECOC, 2008, Tu.4

Fig. 3: measured BER for MDL output; inset shows the

obtained eye

Fig. 4: Input and output bit patterns at 10Gb/s Fig. 2: 2.5Gb/s PRBS pattern with (top) and without

(bottom) an assisting CW injection

ECOC 2009, 20-24 September, 2009, Vienna, Austria Paper 4.2.3

978-3-8007-3173-2 © VDE VERLAG GMBH

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