A digital low frequency spectrum analyzer, using a programmable pocket calculator

A digital low frequency spectrum analyzer, using a

programmable pocket calculator

Citation for published version (APA):

Spruit, W. P. (1978). A digital low frequency spectrum analyzer, using a programmable pocket calculator. (EUT report. E, Fac. of Electrical Engineering; Vol. 78-E-85). Technische Hogeschool Eindhoven.

Document status and date: Published: 01/01/1978

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A DIGITAL LOW FREQUENCY SPECTRUM ANALYZER, USING A PROGRAMMABLE POCKET CALCULATOR

by

Eindhoven The Netherlands

A DIGITAL LOW FREQUENCY SPECTRUM ANALYZER, USING A PROGRAMMABLE POCKET CALCULATOR

by W.P. Spruit TH-Report 78-E-85 ISBN 90-6144-085-8 Eindhoven June 1978

June 1978

A DIGITAL LOW FREQUENCY SPECTRUM ANALYZER, USING A PROGRAMMABLE POCKET CALCULATOR

by

W.P. Spruit

TH-Report 78-E-85 ISBN 90-6144-085-8

Abstract:

A measuring instrument utilising the Texas Instruments' appliances SR 52 or SR 56 is described.

An application as a dig~tal noise measuring system is discussed in detail. The same instrument can, however, perform other functions.

Results concerning sine-wave and noisy input signals are presented.

The instrument makes use of an input-output processor for the SR 52/56, developed by verkroost [lJ, for which the author designed and tested print lay-outs.

2

-INTRODucrION 3

1. THEORY OF OPERATION 4

2. THE MEASURING EQUIPMENT 6

2.1. The processor 6

2.2. The A/D converter 10

2.3. The D/A converter 11

2.4. The de-aliasing filter 13

3. THE SOFTWARE 13

4.

RESULTS 17

CONCLUSIONS 18

APPENDICES 21

INTRODUcrION

The tremendous popularity of the pocket calculator has made it a really versatile piece of computing apparatus, and compared to other arithmetical hardware, the price is very low.

The use is, however, restricted, because it is designed to be man-operated. It could be used as a micro-computing element in intelligent measuring

equipment, if it were possible to feed it directly with digital signals, and read out the results directly, too.

This problem has been solved largely by Verkroost [1']. He designed an input-output processor for the SR 52 and SR 56 programmables. The author made prints for this processor andJwith the help of these, built an automatic measuring instrument (see fig. 1).

CLOCK SR 52/56 PRINTER

(R: W)

In Out

Oe~li~s.ing Sync.&'Adrns Sync. &Adress

Filter

_I

_I

_I

_I

AIlOIl!l9r.

-X-~

X

Vo

D~ta Processor ~ta

~

Analog

aut

"'-Fig. 1: Block diagram of the measuring system

We use this instrument as a programmable digital filter, which computes the mean square of the filtered signal. The filter frequency ranges from

virtually zero to approx. 0.1 Hz (the lower frequency limit being only a function of the experimenter's patience).

This use offers advantages because analog filtering becomes difficult at very low frequencies, and other techniques (like Fast Fourier transform) are very expensive owing to the large computer memories needed. For detailed information 6n the central part of the system (the processor) see ref. [lJ.

4

-1. THEORY OF OPERATION

A digital filter can be represented by fig. 2 [2,3,4].

X--~~---~----~

T

T

T

~+-{D-Multipliation

1Iy-

Aclder: 0: JIIISIC

Time del.y by

1 c:lockperiod T

Fig. 2: A digital filter

The transfer

H (z)

function of such a system is:

N

-n

:L>

z Y 0 n =

X

= N 1

-L:s

z-n 1 n ~-y (1)

-n

where z means an n clock-period time delay. On the other hand, the output of any digital system can be written as:

h' (t) =

L:

h (Icr') <I (t-Icr') K=O

where h(KT) is the sampled value of the signal at time Icr', and h' (t) the sample-and-hold output, which changes at time T, 2T, ••••.• , Icr'.

The Laplace-transform of this function is:

(2)

with P = a+jw Further we have z = (4) This gives: {h' (t)1 =

L

h(KT)z-K (5) K=O

This relation makes it possible to find the digital equivalent of an analog filter by means of digitizing. However, we do not use thi. straightforward method, because digital filters have transfer function. which recur with

2"

a period of 1/2 W _s (W _s

=

the sample fre~ency of the system

=

--T) in the frequency domain. This wculd need complicated analog filter to be converted.

Therefore, we use a frequency-domain transformation, which makes it possible to convert all normal analog filters into digital ones, without the

properties (in the frequency domain) changing appreciably.

This transform (called bi-linear z-transform) transforms W of the analog

filter into V of the digital one:

z-l W = z+l

where W = u+jV"

For W

=

jV and z

~

epT (4) this yives:

W

- - 11

W

s

Relation (7) implies that all v will be represented by w's lying between -1/2 ,; W ,,1/2.

s

(6)

(7)

This eliminates folding of

v,

but introduces a nonlinear frequency distortion known as "frequency warping".

The effect of frequency warping upon the properties of the system will be shown in s,ection 3. :U one tu,.es. this effect into account the bi-linear z-transform makes: it possible to us:e all anal9g filter design methods for digital filters, too.

6

-A source of errors is formed b:,: the fact that the signal is "sample-and-hold" before it can be digitized (see fig. 11.

The transfer function of a first-order sample-and-hold circuit is [3J:

·wT .6i

₁₁₂

X (jw) = wT exo 2 _jwT 2

The modulus of this function is pictured in fig. 3. It is obvious that it influences the total system response.

Ui

Uu CLOCK 1 r -__ _

.1.

..

o

o

Fig. 3: First-order sample-and-hold with its transfer function

The realization of the function pictured in fig. 2 by means of a pocket calculator is quite simple. The quantities ao-a_n and Sl-

S

n can be stored into the various registers. The delay functions can also be performed by the registers (one for each unit) •

Since the SR S2 contains 20 registers, a 6th order filter would be possible.

2. THE MEASURING EQUIPMENT

For convenience, we shall give a summary of the working principles of the processor (cf. ref. [1 J) •

The processor consists of three parts:

- the encoder (print 21,

- the decoding and memory part (print 1, I.C. 's, 3 A-D, 4 A-D and 5 A-D), - the controller (print 1, r.C.'s.l A-C and 2 A-E).

The encoder

The keyboard of the calculator itself consists of a switching matrix (see app. 10). The columns· of the matrix are fed with the "digit pulses". (16 time-shifted pulses, which are also used to multiplex the display; see fig. 4). I I I 0, 00

- ,

-.. I

Fig. 4: Digit pulses

The rows of this matrix are connected to the "key inputs" of the arithmetical logic.

The calculator clock (~1)' D₁₅ and 4 of the 5 K inputs are carried outside the calculator to the processor. With the aid of ~1 and D

15 all 16 digit pulses are re-formed in the processor. (I.C. 9, 13 and 16). Encoding of

incoming data is now possible by connecting the appropriate digit pulse to the appropriate K input (through I.C. 15). The keys simulated are:

0-9, +/-, . , EE, R/s resp. A (SR 56 and SR 52 respectively).

The decoder and memory

To decode the mUltiplexed data of the display, it is not only necessary to decode the 7-segment code into a BCD code, but also to know the timing schedule of the multiplexer. This is rather complicated.

The display itself has the format:

- sign of mantissa,

la-digit mantissa (with. di.gital point anyWhere between sign of the mantissa and sign of the exponentl,·

- Sign of the exponent, - 2-digit exponent.

The digits are diaplayed from left to right in time slots of the digit puls.es (There are Bauch. time slots p 1 -p B in a digit pulse. P 1 -p 8 are generated by I.C. 111 (see fig. 51.

On

-

...

--

t

Fig. 5:

The timing is:

- The 10 digits of the mantissa at

with the most significant digit (m.s.d.) at.D₁₂P2. - The digital point at one of

according to the place of the point. - Information on the EE mode at

(" 1" means exp-mode) • - The exponent at

The sign of the mantissa at The sign of the exponent at

According to this schedule a write-enable pulse train is formed (I.C. 1,2,6,7, 8, and 12).

These pulses enable the memory I.C. (I.C. SA) to store the decoded data in the sequence of table 2.

The decoding itself is performed by I.C. 3B-D, 4B-D and SB-D.

The coding of the BCD code is given in table 1 (Note that more codes are used than in the normal BCD-code).

TABLE 1 TABLE 2 DATA 0 C B A ,DATA/ADDRESS' 0 C B A 0

o

0 0 0 , .

'*

MSD'Dig. P.oint

o

0 0 0 1 0

o

0 1 Dig. 2/Dig.P.oint

*

000 1

·

_·

·

·

·

·

·

·

•

·

·

·

·

·

·

·

·

·

·

·

·

·

·

·

*

9 1

o

0 1 Dig. 10/Dig. P.oint 1 0 0 1

-

1 0 1 0 Dig. P.oint 1 0 1 0

*

-

1 0 1 1 Sign Mantissa 1 0 1 1

Dig. p.oint 1 1 0 0 EE/N.o Exp. 1 1 0 0

change sign 1 1

o

1 MSD Exp 1 1 0 1

EE 1 1 1 0 Sign Exp 1 1 1 0

IN.o Display 1 1 1 1

*

LSD Exp 1 1 1 1

*

Leading zer.o's are .omitted

*

if displayed

The c.ontroller

The c.ontroller takes care .of the pr.oper timing .of reading data inte the calculat.or, storing the result and transmitting this to a D/A converter or t.o the next pr.ocess.or/calculat.or c.ombinatien.

Note that more .of these units can be cascaded in .order t.o make higher-.order filters. We used .only .one.

Fer use with A/D and D/A c.onverters it is necessary t.o describe the input and output signals .of the c.ontr.oller (see fig. 6).

The cyclus begins at the cl.ockpulse, which starts the A/D cenversi.on. The A/D converter generates the signal G{O,l) when c.onversi.on is c.ompleted. The pr.ocesser answers with cl.ockpulses called "Read G

p (O, 1)" which clock the data - in .order .of table 3 - in the calculat.or, until all data are cl.ocked in.

Hereupon the AID cenverter s,inks G (O, l) and generates set C₁, which sets the calculator te execute ,the pregram (During C₁ the program is perfermed, and the final display 1nfermat1.on st.ored).

When C₁ rises again, the processor generates C₁ {1,2}, which enables the D/A cenverter t.o clock-in data in the .order .of table 2.

10

-We made no use of set C

2 and C2, because the DIA converter needs virtually no time for conversJ:on.

The schematic drawings of the processor and the print lay-outs, together with component placing are given in app. 1-6.

Clock Status AOe G(O,I ) RndCp G<O,ll Set C 1 run y (;(1,2)

J

~

₍

I ~ J.... I I

lllWIIWUr

I I _J I I

P

I I I I

(

I I I _I I I

_\.p!

I I

_I

I I _I I I I _{I I} I I I I ,

,

_{I I}

.

~

....

..

I I I

....

_I

1

.5 " c _{1"1._ U} I _I .g' I

.!'

~ ~

I ~

1,;

I

Fig. 6: Timing of the controller signals

I

r

I I

•

I I I ....

.!'

I t I

The AID converter is rather simple in design (see app. 7). We used a dual slope converter with 3~ digit precision, which needs a minimum of external components, not even a sample-and-hold circuit, because the input-frequency is low compared to the maximum conversion frequency.

The three 8-to-l multiplexers (-151) multiplex the output data of the AID

converter a they are addressed by the 8-counter (-193), which in its tUrn gets its clockpulses G ·(0,1) out of the processor.

p

As long as the outputs of this counter are· not all 0, G (0,1) leaves 1 and clocking continues. When G(O,l! sinks, set C

1 will give a pulse to indicate the end of sending.

In this way the data are clocked in the order of table 3 (as mentioned earlier) . TABLE 3 Clockpulse

no.1

D C B A .DATA· 1 a a a a a 2 1 1 1 1

-3 1 1 1 X Sign 4

x x x

X Digit 1 (MSD) 5

x x x

X Digit 2 6 X X X X Digit 3 7

x x x

X Digit 4 8 1 1 1 1

-A device has been incorporated giving the warning "sampling too fast". This signal is set when clock

*

C₁

=

1 and reset when clock

*

C₁

=

1. This means, that it operates when the AID converter starts before C

1 is lowered.

Some special attention should be given to the overload protection of th@ AID

converter. This type of converter shows all its outputs "0" in overload condition. This means, that a noisy signal at the edge of overload will b@

seen as if it were changing from "1999" to "0000", which will cause excessive

overload of the filter. Effective clipping of the input signal is, therefor@, essential. It is true that clipping disturbs th@ spectrum, but this is less bad than the effect mentioned above. For technical information on the AID

converter see ref. [5J.

The calculator displays a la-digit mantissa and a 2-digit exponent plus signs. This makes it impossible to convert the

converters have at best a dynamic range

whole displayed 5

of 10 •

number, because DIA

Because the output of the converter is used to feed a recorder, a 3-digit BCD converter is accurate enough. At this point, the need arises to fix a certain format. This fixes the place of the significant digits on the display, and therefore in the memory register of the processor, too. We chose a format of 5 fixed-point digits, and no exponent, whereas the number that is displayed is always less than 1. 00000-.

12

-Form the 5 digits that follow the point 3 are converted. Usually the 3 leading digits are converted, but if the first one or two of them are zero, the middle respectively last, 3 digits can he converterd. This gives a higher dynamiC range to the converter.

As there were no D/A converters available with BCD input and sign, we used a 3-digit converter with a separate inverting amplifier. The output of the system is connected to the output of this amplifier or the output of the D/A converter by means of a reed-switch, which acts upon the sign. This is possible because of the very low speed of the whole system.

For the selection of the digits to he converted a 16-counter (-193), which counts the Read C pulses, and a 1-of-16 decoder (-154) are used. The five

p

last digits of the mantissa will thus arrive at the input of the D/A converter in conjunction with the C pulses 5-9.

p

(The signals of pins 7-11 of the -154 will be low at their respective times) (see also table 2).

Three of the output pulses of the 1-of-16 decoder are selected by means of a switch to trigger 3 quad latches (-75) which latch the data for the converter.

This switch acts as a multiplier of the output signal, (i.e. when the first one or two of the digits after the point are zero, one can convert the digits 2, 3 and 4, respectively 3, 4 and 5 instead of 1, 2 and 3. This means a

multiplication of the output by a factor 10 and 100 respectively).

An overflow indication is incorporated. The 4th -75 detects whetoer ._he 2 digits preceding the point are "no display" and O. When this is not the case, the output is connected to 10.00 V by means of a reed relay R

l, and an output which is meant to drive an L.E.D. ("format") is switched on.

The sign is converted (as mentioned) by R2 and the 5th -75, which is triggered upon the 15th Read C pulse.

p

The outputs 1-5 of the 1-of-16 decoder (-154), which stand for the digital point and the 4 digits preceding it, are carried outside. This makes it possible to convert also the 3 digi.ts preceding the point (the fourth digit and the point are used for overflow detection). The use of this second D/A converter is explained in section 3. For technical information on the D/A converter see ref. 5.

The schematic diagram of the aliasing filter is given in app. 9.

It is a 6th-order Chebyshew· low-pass filter with 0.5 dB ripple [4,6]. This means a ripple of 6%, which is sufficiently small for our purpose (Chebyshe"

filters have better attenuation slopes than maximum flat filters).

The highest roll-off frequency is chosen 0.095 Hz which gives an attenuation of less than 0.2 dB at 0.09 Hz and 55 dB at 0.20 Hz.

This forms a good de-aliasing filter for a sample-frequency of 0.20 Hz,

whic:, is chosen, because the calculator needs approximately 3s to perform its program. For more complicated programs, with more than 5s performing time,

the roll-off frequency of the de-aliasing filter can be divided by 2 by means of reed switches.

See further refs. [4] and [6].

3. THE SOFTWARE

To demonstrate the usefulness of the system, the following noise measuring set-up will be demonstrated (see fig. 7):

~nd~~' filter Integr~tor

C>

I

Out

R::;

_%

X2

L

I

-

-

-

r--I

_I

nOise Low nOI~e Qe ... li~~ing

_I

_fo' jfo

I

source ~mplifier fll ter

_{I I}

I

Auto~tlc

I

I

(de-ltuning _function

I

I

.

I

FunctIOns performed by ~lcul~tor

I

Fig. 7: Noise measuring set-up

A flow diagram of this program is given in fig. 8; the program itself is listed in app. 10.

nlegr~le

r-f

ROO,tO Reset integrator LCliidROO with N R09+ I ROg;&, 0 15pl~y a~ print

(~f

&

L

x3M

- 14 -compute ~d $tore

f iller coefl icients

L~d ROO with N:IO~

L~d R09wlth -10

RETURN

Displ~y n

LX~

Fig. 8: Flow diagram of the program

The program calculates the filter coefficients ~1,2 and 6

1,2 for a given starting frequency w /w. It calculates the output of the bandpass filter,

o s

and the mean square of this filtered signal by means 6f integration. The integration time is 10 periods of

w •

At the end of the integration, the output signal is printed out, and the integrator is reset.

This is done 10 times in order to be able to detect spikes in the filtered signal.

One may average by hand over the significant outputs afterwards.

When the instrument has integrated 10 times for the same frequency, it calculates a new filter frequency,

It then calculates the adjoining new filter coefficients and st~rts filtering again. This gives a spectrum

is built in, which prints ~

o end of each frequency.

with 5 frequencies per decade. A print command N 2

and t X /N separated by the digital point at the

This quantity is displayed also. The second D/A converter becomes useful here, because the spectrum can be written on an X-Y recorder, with the aid of the second converter.

x---r---,

~T

... - - y

Fig. 9: Bandpass filter

The bandpass filter is a second-order filter with the transfer function:

H(p) = w o Q 2 Wo p 2 + I?

16

-Applying the bi-linear Z-trans.form we have:

H(Z) = with v o Q (1 + v . o 2 2 -1 -Q + v )-t-(2v - 2)Z + (1 o 0

This transfer function is realized in the block diagram presented in fig. 9 with: v _{o· 1 .} <Xl = -<X 2 = Q _{.. vo} 2 1 + - + v Q 0 v ₂ 1 - ...£+ v S2 = _v Q 0 2 1 + ...£+ V Q 0 2v 2

-

2 0 Sl = _v 2 1 + ...£+ _Vo Q

The quantities <X₁,2 and Sl,2 which are calculated in the program steps 144-215 are stored in the registers R₁₅, R1B and R

19 respectively. The time-delays Tl and T2 make use of R02 and R03 respectively. In this program Q has

1 been taken 10, but owing to frequency-warping, Q will increase for Wo +

2

ws. Fig; 10 illustrates this increase of Q. The output of the total system should be multiplied by this function (for noise measurements). The integrator is quite simple: where N N Y =

L

i=O = 10 w /w o s (; 10 peri odes of w ). o .

The above filter system i.s an examl?le: fixed higher-order (to 6th order) filters, or even quite different systems, computing correlation coefficients or probability distributions are possible.

30 20 1O~---==-=---

---I

I

I

I

I

I

I

I

I

I

I

I

I

1

-I

I

I

OL-____

L -____ ~ ____ _ L _ _ _ _ ~ _ _ _ _ ~ _ _ ~ 0.5,~

o

0.1 0.2

0.3

Q

.

.4 Fig. 10: 2 11

_•

B

_•

-'"

0.5

,

Il.~ c:...-_:l~-~~-_:l~-_:L:_-__:~--~--J

G.OS 0.1 0,2 0.5

-~

....

Fig. 11: Frequency response, A: uncorrected; 5: corrected

4. RESULTS

Fig. 11 gives the output of the described filter for a s.ine wave input, with constant amplitude and the bandfilter tuned to this frequency •

18

-A - corrected,

B- corrected for frequency warping, ripple of the aliasing filter and the transfer function of the sample-and-hold (see also figs. 3 and 10). This correction is carried out by hand.

In fig. 12 is represented the 9utput of the system for a sine wave input, with fixed Wo vs frequency. The effect of frequency warping is here clearly visible.

Fig. 13 shows the output for noise with a l/f spectrum corrected for the above mentioned effects.

The deviation from the l/f line is within 20%, as is to be expected for averaging over about 100 periods (we assume here that the statistical error in the spectrum is inversely proportional to

-I1£.T'

=~

where N is the number of periods, over which integration is carried out.

In the result of fig. 13 the existent "spikes" in the output of the filter have been ignored. The spikes are caused by R.F. interference from

electrical apparatus, and the like. Because the system is rather sensitive to such interference, and because the calculator has a virtually infinite

dynamic range (about 10200), the system should be shielded well and provided with a good mains filter.

CONCLUSIONS

The automatic measuring instrument here described, is a convenient and inexpensive low-frequency noise measuring set-up.

Operating the system is rather easy. The use of prerecorded magnetic cards eliminates the need of programming experience of the operator.

The system shows no significant differences in properties with respect to the analog filters normally used for audio frequencies.

The frequency range is, however, restricted to about 0.1 Hz (upper limit). If one takes into account that the experimenter·s time is restricted, the

-4 -1 -4

frequency range is about 10 to 10 Hz. At 10 Hz one point of the spectrum takes about 12 days. if one int.egrates over 100 periods. But this is a general restriction to nois.e maas.urements at low frequencies.

Other Uses than those described are possible, but this a matter for further investigation.

The author wishes to thank lr. G. verkroost and Ing. A.C.P. van Maar who developed the input-ou~put proces.sor for. the SR 52/56 and who g"ve a great deal of assistance in building the instrument and applying the digital filter techniques.

I(jotI

t

181 0 -10 -l0r::.. _ _ -05 0.11 0.7

as

09

-

_!1o

Fig. 12: A: W

/w

= 0.1; B,

w

/w

=

0.4 o s 0 S

Sy

t

~I

Arb. Units .100 .10 20 -o

•

xl

L-____

L-________________

-L ________________

~L_ __ _J -'3 10 Fig. 13:

-2

10 -1 _ 10 f (Hz)

--.-~ .. .

-~~

. ...J

APPENDIX 1

r-loA C o o o o o o o o o o o o o o 0 o 0 o 0 o 0 o 0 o 0 0 o 0 o 0 0 o 0 o 0 o 0 o 0 o ~ , 0 o ~ 0 •

~~p,.

~

2 Onderzijde

22 -22

~:I.~~==~~~~

APPENDIX 2 Print 2 2

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APENDIX 3 Component placing

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•

6K

e

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1..2

C~

_{PRINT 1}

AS

:.".C12 11 ~ 10

C~'·A'.4

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+ APPENOIX 4

5

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"

APPENDIX 5

PROCESSOR

PRINT 2

NO Name 1

v

2 D 15 3 D4 (D 1) 4 Q_D 5 K 6 7 o A 26 -Cable-list

Print l/Conne tor 1

Name -5V

P

1 C28 Read

P₂ A

28 (P2 A4) Read Cp G(O,l) P

1 C30 calc

8 Read Reset Teller P 1 C29 9 TE 17 10 11 12 13 G(l,2) 14 C 1 ~-..,-15 Reset 16 set C 1 17 DPT 19 P 4a

--=..::.-=-20 set C 2 21 Write WE 22 23 24 25 26 27 28 29 30 31 32 Read C p G(l,2) Write C p Read D4

!

:~

I

DATA D1 A B C v+ OUT P₂ A 26 P 1 C2/P1 C20

!

of A C 2 G(l,2) Ready G (0 ,1) D o Read h 9 f e a b 7 ilegm code

,

D1 P5 D 15 Read Reset

v

C calc

,

P 2 A27 P 2 AlO/P 1 A2 P 1 A8 P 1 A4 -5V APPENDIX 6'

A No Name 1 2 3

-4 _Dl

-5 D 0

--6 D 10 7 Q_B 8 Q_A 9 Q c 10 Write Reset 11 Ready 12 13 v+ 14

-15 V 16 17

--18 P 4a 19 20 21 22 23 24 Write WE 25 KQ (KS) 26 Write Cp 27 _{D1 P 5}

-28 _D4 29 KP(KQ) 30 KS(KP) 31 KN 32 Print 2/Connector 2

•

Name (P 1 A₃) 1 P₁ C 19

_--

DIS P 1 A18 IDLE P 1 A31 PI A30 P 1 A29 PI C28 P 1 C13 +5V v+

-- V P 1 A19 DPT 17 T.E. P1 A21 D1 calc _D2 DATA IN P 1 A23 D3 P 1 C27 D4 P 1 A3 calc calc calc C

•

calc calc calc

--5V P 1 A17/calc P₁ C 10 P 1 C9 AID APPENDIX 6

+5V ) 32 lK2 Overtoad B:::l07

i

DATA Out ABeD L.,13.14.r! 5 > -,..----l15 ~--/1 (-151) 9f---+-lc+. .--- 2 II f---f-I-Hf-. r -3 8.12

n

3

rj~;---;7~2~~S~I~~

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t---'-t-t---++-'---J

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L

8.1~511

T

APPENDIX 7

AID CONVERTER

is

A2~ 015 )lr"\..J2 4,11,16 G (1,2)

L/

(-193) 1'1& Read

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T

~

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U

cs

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2 ~I 1 3M3 4.13 12 8 Z3 11K ~ +,

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I

APPENOIX 8

o

_o

_{0/ A CONVERTER}

'"

<D

.15 +15 .15 F 131jJF 5.46iJF r;QOK .40101 2.40101 1.42M 1.42M 201': 1. 20M 20K 708K 20K

J~_~1

P1 _r2 r3 P3 _T 4Jl)JF 1.00jE

+

100)JF 1K 1K

.

.

-TUNE TO : w +15

~'f*3

0 fo !-in/Ho Stilge 1 0.03764 Hz 0 dB Stilge 2 0.07297 5.SO iJ St.age 3 0.09609 16.30 APPENDIX 9

DEALIASING FILTER

Step 1

iRoo

~05

iR

₁₀ R 15 Procedure Enter program

*

Enter start frequency

II

Ruri./Reset

Ii

on·

ii

Run

ii .

dsz Vin Enter Card (Side A) card (Side B) WO/W S ,REGISTERs ROI R02 Tl Lx2 _+l:X2 R06 w /w H07 w /w RU "2 R₁₆ Yin o s \l 0 w /w o s o s R12 R17 LABELS C PROGRAM LISTING

Display Key Display Key Display Key

*

000 46 LBL 015 00

a

030 01 1 001 11 A 016 04 4 031 08 8 002 65 X 017 65 X 032 65 X 003 43 RCL 018 43 RCL 033 43 RCL 004 01 1 019 01 1 034 00

a

005 05 5 020 09 9 035 04 4 006 85 + 021 85 + 036 75

-007 42 STO 022 43 RCL 037 43 RCL 008 00 0 023 00

a

038 00

a

009 01 1 024 02 2 039 01 1 010 43 RCL 025 95 ~ 040 95 ~

all

00

a

026 42 STO 041 42 STO 012 03 3 027 00 0 042 00 0 013 95 ~ 028 03 3 043 02 2' 014 42 STO 029 43 RCL 044 43 RCL

I

Press 2ND READ 2ND READ B R03

I

T2 R08 N2 R 13 used R 18 "3 D Display Key 045 00

a

046 04 4 047 55

.,..

048 00 0 049 02 2 050 00

a

051 00

a

052 95 ~

*

053 57 fix 054 05 5

*

x2 055 40 056 44 SUM 057 00

a

058

as

5 059 59 *dsz Display N 1. 00000

I

R04 V (l'p) ₀ R09 Nl R14 R 19

"

4 E Display Key 060 01 1 061 01 1 062 09 9 063 00 0

*

064 48 EXC 065 00 0 066

as

5 067 55 .!..

.

068 43 RCL 069 00

a

070 08 8 071 42 S'l'O 072 00

_{o ,}

073 00

a

074 95 = APPENDIX 10

32

-Display Key Display Key Display Key Display Key Display Key

075 42 STO 105 55

-

.

135 95 = 165 01 1 195 95 = 076 00 0 106 93 • 0 _{136 34 tan 166 05 5} 196 42 STO 077 06 6 107 02 2 137 42 STO 167 01 1 197 01 1 078 01 1 108 22 INV 138 01 1 168 75

-

198 08 8

*

079 44 SUM 109 28 log 139 01 1 169 43 RCL 199 01 1 080 00 0 110 95 = 140 55

-

_.

170 01 1 200 00 0 081 09 9 111 12 B 141 01 1 171 01 1 201 55 .!..

.

082 43 RCL 112 43 RCL 142 00 0 192 40

*

X 2 202 43 RCL 083 00 0 113 00 0 143 85 + 173 95 = 203 00 0 084 09 9 114 06 6 144 01 1 174 55 .!..

·

204 07 7

*

085 22 INV 115 57 fix 145 85 + 175 43 RCL 205 95 =

*

*

086 90 ifzro 116 05 5 146 43 RCL 176 01 1 206 57 fix

*

087 01 1 117 98 prt 147 01 1 177 03 3 207 00 0

*

088 01 1 118 66 rtn 148 01 1 178 65 X 208 52 EE 089 02 2 119 43 RCL 149 40

*

X 2 179 02 2 209 22 INV 090 43 RCL 120 00

a

150 95 = 180 95 = 210 52 EE

091 00 0 121 05 5 151 42 STO 181 42 STO 211 42 STO

092 07 7 122 55 -

.

152 01 1 182 01 1 212 00 0

*

093 57 fix 123 43 RCL 153 03 3 183 09 9 213 08 8·

*

094 03 3 124 00 0 154 20 l/x 184 43 RCL 214 42 STO 095 52 EE 125 08 8 155 65 X 185 01 1 215 00 0 096 03 3 126 95 = 156 43 RCL 186 01 1 216 00 0

*

097 22 INV 127 56 rtn 157 01 1 187 55

·

217 01 1

*

098 52 EE 128 46 LBL 158 01 1 188 05 5 218 00 0 099 44 SUM _1129112 B 159 55

-

.

189 55

·

219 9-4

+/-·

100 00 0 130 42 STO 160 01 1 190 43 RCL 220 42 STO 101 06 6 131 00 0 161 00 0 191 01 1 221 00 0 102 43 RCL 132 07 7 162 94 +/- 192 03 3 222 09 9

*

103 00 0 133 65 X 163 95 = 193 75

-

223 56 rtn 104 07 7 134 59

*

IT 164 42 STO 194 01 1

*

_{denotes 2nd function key.}

.

01

02

03

os

06 07 08 [)9 \--+-~f--+---t--~-010 Kn Ko Kp Kq K s Kt

SR S2

Keyboard Connections

SRS6

01

02

H:>lM-03 04 1--+--05

1---1---06

1--+--07 ... +---08 1--+--09

1-+--1--+--+-+-010

JI-+--014 1-+--1---+--015 Kn Ke Kp Kq K~ Kt APPENDIX 11

....

..,

- 31.

-·0

~---g TMC 0534 B T g

8

0

-

lSI.

-041

_C~;~~£J ~

= -.

=~

0 ' "

~~

B"'

~i

Db'

[~j.' C;:~~JJ-

=3

D~

'"

_S c::::J -_c::::J~

[:~!:~!fD

Power converter

0

PIN ASSIGNMENS

TMC 537

-=

=4'

= -.

[:::::J-I;

Powe r converter

@

n

>

::0 0 ::0 " ,

>

0 " , ::0

@

(f)

:::0

~

APPENDIX 12

REFERENCES

1 G. Verkroost, to be published.

2 H.W. Schussler, Digitale Systeme zur Signalverarbeitung, Springer 1973.

3 W.D. Stanl~y, Digital Sign.l Processing, Prentice Hall 1975.

4 L.P. Huelsman (Ed.) Active Filters: Lumped, Distributed, Integrated, Digital and Parametric, McGraw Hill 1970.

5 Datel Systems Inc. Engineering Product Handbook, Gold Book 1976.

6 Howard W. Sams & Co Inc., Reference Dat. for Radio Engineers, 5th ed. , ITT 1972.