-- Profibus sensor card glue logic
-- Author : P. Zinken _. Last rev.: 12-06-98
-- The later of the two signals RD or CS for the SPC4 has a setup time of -- 8 ns before rising edge of SPC4 clk
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use work.decodecpkg.all; -- package contains rotation-decoder use work.ql_macros.all; .- package contains qUicklogic macros
E~
entity memdec is port
( reset
std_logic_vector(11 downto 8); -- for JTAG purposes
std_logic_vector(7 downto 0);
architecture memdec_arch of memdec is
subtype byte is std_logic_vector(7 downto 0);
subtype offseLaddUype is stdJogic_vector(3 downto 0);
constant spc4_base: std_logic_vector (15 downto 0):=X'EOOO';
constant glue_base: std_logic_vector (15 downto 0):=X'FOOO';
An intelligent sensor controller using Profibus
ELLIJ5S ~
•• offsets within glue
constant mem_mode_offset : offseCaddUype := X"O';
constant flash_bank_offset : offseCaddctype:= X'1';
constant id_offset : offseCaddctype := X'2';
constant ouUeg_offset : offseCaddr_type:= X'S';
constant irq_reg_offset : offseCaddctype := X'4';
constant gpLoffset : offseCaddctype := X"S';
constantgpUr~mask_offset : offseCaddctype := X'S';
constant cntrs_hUeg_offset : offseCaddctype:= X"7';
constant p_cnUo_reg_offset : offseCaddctype:= X"S";
constant ccnUo_reg_offset : offseCaddctype:= X"g';
constant cnCmode_reg_offset : offseCaddUype:= X"A';
o .r_zero I clo I r_hi I latch I p_zero I p_lo I p_hi I gpUrq
0 0General Purpose Input register
o .GPI0 interrupt mask register
0 0highest nibble count r I highest nibble count p
0 0lowest byte p_countervalue
•• lowest byte ccountervalue
0 0000000 I r_rsLenable I p_rsLenable
•• local signals
signal clk, clkn. clk_c
•. outputs signal ouCreg
•• general purpose inputs signal sgpi. dsgpi
signal sp_zero. sp_hi. sp_lo signal dsp_hi. dsp_lo
: offseCaddctype is addcinJ_O(S downto 0);
: byte;
: std_logic;
: std_logic_vector(1 downto 0);
: stdJogic_vector(2 downto 0);
: std_logic;
: std_logic_vector(S downto 0);
: std_logic_vector(7 downto 0);
: std_logic;
: std_logic_vector(7 downto 0);
: std_logic;
: std_logic_vector(11 downtoO);
: std_logic_vector(11 downto 0);
: std_logic;
: std_logic_vector(11 downto 0);
: std_logic_vector(11 downto 0);
: std_logic;
: std_logic;
: std_logic;
An intelligent sensor controller using Profibus
begin
•• test pins
-- dataout<=d_out when ((glue3s='1') and (rdn='0')) else'ZllZllll';
•• pct(11 downto 0)<=r_count;
.- split bidirectional ad bus in internal d_in and d_out busses d_in<=ad;
ad<=d_out when ((glue3s='1 ') and (rdn='0')) else?ZZZZZZZ';
d_out<='000000'&mem_mode
when offseCaddr=mem_mode_offset else '00000'&flash_bank
when offseCaddr=flash_bank_offset else
"0'&id
when offseCaddr=id_offset else
'0000"&ouUeg
when offseCaddr=oucreg_offset else sgpi
when offseCaddr=gpLoffset else gpUrq_mask_reg
when offseCaddr= gpUrq_mask_offset else sr_zero&sUo&sr_hi&latch&sp_zero&sp_lo&sp_hi&gpUrq
when offseCaddr= irq_reg_offset else sp3nUeg(11 downto 8)&sccnUeg(11 downto8)
when offsecaddr= cntrs_hLreg_offset else sp3nUeg(7 downto 0)
when offset_addr=p_cnUo_reg_offset else sr3nUeg(7 downto 0)
when offseCaddr=r_cnUo_reg_offset else '000000"&usCenable&p_rsCenable
when offseCaddr=cncmode_reg_offset else
.
---_.;if (offset_addr=mem_mode_offset) then jf (glue3s='1') then
mem_mode<=d_in(1 downto 0);
end if;
An intelligent sensor controller using Profibus
if (offseCaddr=flash_bank_offset) then if (glue_cs='1 ') then
flash_bank <= d_in(2 downto 0);
end if;
end if;
end if;
end if;
end process;
-- read/write signal generation
process (rdn, wrn, wrn_delayed2, addUn_15_12, mem_mode, flash_bank) begin
f1ash_wrn <='1 ';
case mem_mode is
when "00' => -- lower 64K of flash
addr_ouU6_14 <= '0' & addUn_15_12(15 downto 14);
flash_rdsel <= '1';
ram_rdsel <='0';
when '01' => -- upper 64K of flash
addr_ouU6_14 <= '1' & addUn_15_12(15 downto 14);
flash_rdsel <= '1';
ram_rdsel <='0';
when "10' => -- 32K RAM only
addr_ouU 6_14 <= '0' & addUn_15_12(15 downto 14);
flash_rdsel <= '0';
ram_rdsel <='1';
when others => -- illegal mode addr_ouC16_14 <= '---';
flash_rdsel <= '0';
ram_rdsel <='0';
end case;
else -- data memory
if (addUn_15_12(15)='0') then -- lower 32K is RAM addr_ouU6_14 <= '0' & addUn_15_12(15 downto 14);
flash_rdsel <= '0';
flash_wrn <='1';
ram_rdsel <='1 ';
E~
An intelligent sensor controller using Profibus
if (addUn_15_12(14) = '1') then -- COOO-FFFF addcouL16_14 <= •••••;
flash_rdsel<= '0';
f1ash_wrn <= '1 ';
ram_rdsel <= '0';
ram_wrn <= '1';
if (addUn_15_12(13 downto 12) = spc4_base(13 downto 12)) then spc4_rdsel<= '1';
if (addUn_15_12(13 downto 12) = glue_base(13 downto 12)) then glue_cs <= '1 ';
flash_rdsel <= '1 ';
flash_wrn <= wrn_delayed2; -- use cktpad for clk24
C1: CKTPAD port map(
P => clk24, -- clk24 input
00 => clkn, -- inverted clock output 01 => clk, -- hidrive clock output 02 => clk_c -- normal clock output );
-- Use d'Morgan:
-- rdsel = (not(psen)) or (not(rdn_delayed2)) not(psen and rdn_delayed2) -- ram_rdn = not(rdsel and ram_rdsel)
-- ram_rdn = not[not(psen and rdn_delayed2) and rdn_delayed2) -- ram_rdn = (psen and rdn_delayed2) or (not(ram_rdsel))
E~
An intelligent sensor controller using Profibus
-- make delayed 'short' rdn/wrn
process (elk, reset)
process (elk, reset, wrn, wrn_delayed1) begin
if (reset='1 ') or ((wrn = '1 ') and (wrn_delayed1='O'))then wrn_delayed11 <= '1 ';
else
process (clkn, reset, wrn, wrn_delayed1) begin rdn_delayed1 <= '1 ';
else
process (clkn, reset, fasLrdn) begin
if (reset='1 ') or (fasUdn='1 ') then rdn_delayed2 <= '1 ';
else
E~
An intelligent sensor controller using Profibus
rdsel <= (psen and rdn_delayed2); -- active high rdsel!
-- pads for rdn signals
81: OUTORPAD port map(
A 1 => ram_rdsel, -- inverted input A2 => rdsel, -- normal input P => ram_rdn -- output );
82: OUTORPAD port map(
A 1 => spc4_rdsel, A2 => rdsel,
if (offseCaddr = ouUeg_offset) then if (glue_cs='1 ') then
ouUeg <= djn(3 downto 0);
end if;
end if;
end if;
end if;
outn <= not(ouCreg); -- active low outputs!
end process;
--- GPI
gpUrq_mask_cs <= '1' when ((glue_cs = '1 ') and (offseCaddr = gpUrq_mask_offset)) else '0';
Eiiis
An intelligent sensor controller using Profibus
E~
-- gpUrq_mask process (wrn, reset) begin
if (reset = '1 ') then -- all interrupts disabled
gpUrq_mask_reg <='00000000'; --Sr, SO, Cr, Br, Ar, Cp, [Bp, (Sd2)], [Ap/(SdllSfull}], 1=enable else
if rising_edge(wrn} then if (gpUrq_mask_cs = '1 ') then
gpUrq_mask_reg <= d_in;
end if;
end if;
end if;
end process;
-- synchronise gpi with clk process (clk)
-- delay sgpi (metastability!) process (elk)
if ((glue_cs = '1 ') and (offsecaddr = irq_reg_offset» then if (wrn_delayed11 = 'O') then
if (d_in(O) = 'O'} then gpUrq <= '0';
end if;
else
if ( (sgpi(7 downto O) and gpUrq_mask_reg}1=
(dsgpi(7 downto O) and gpUrq_mask_reg} } then gpUrq <= '1';
end if;
end if;
end if;
end if;
An intelligent sensor controller using Profibus
-- hi/1o bound indication process (clk, reset)
if ((glue_cs='1 ') and (offseLaddr=irCL-reg_offset)) then if (wm_delayed11 ='0') then
if (d_in(1) ='0')then sp_hi <='0';end if;
if ((glue_cs='1 ') and (offseLaddr=irq_reg_offset)) then if (wrn_delayed11='0') then
if (d_in(3)='0') then sp_zero <= '0'; end if;