Switching Theory / Schakeltechniek 5A050
Lab session Sequential circuits
Highlights previous session
• From binary to decimal:
11010 = 1 x 24+ 1 x 23+ 0 x 22+ 1 x 21+ 0 x 20= 26
• From decimal to binary:
successive division
47 in binary ? 47 / 2 = 23 23 / 2 = 11 11 / 2 = 5 5 / 2 = 2 2 / 2 = 1 1/2 = 0
remainder 1
“ 1
“ 1
“ 1
“ 0“ 1
1 0 1 1 1 1 check: 32 + 8 + 4 + 2 + 1 = 47 !
Number systems • 2’s complement:
dec: +42’s c: 0100 dec: -4 2’s c: 1100 complement
1011 add 1
Highlights previous session
Arithmetic circuits: ripple carry adder
FA A3 B3
C S3
FA A2 B2
S2
FA A1 B1
S1
HA A0 B0
S0
A3 A2 A1 A0 + B3 B2 B1 B0 C S3 S2 S1 S0
Addition: A
B S
C
Circuits with memory
Memory:
behavior of a circuit is determined by the current inputs plus inputs from the past
0 10
20 40 30 50 60
70
• Lock only opens when a designated sequence of inputs is received
• Combinational circuits do not have memory
A simple memory element
0 / 1 1 / 0
• values are stable: it remembers a 0 or 1 value
• difficult to change a value
Idea:
• reset Q (Q becomes 0) if R is 1
• set Q (Q becomes 1) if S is 1
S R
Q
x 0 0 1 1
c + x 0 1 0 0 0 c
0 1 1
invert x
reset output c: control
The R-S latch
S R
Q
S
R Q
Q
Truth table:
R 0 1 0 1
Q Q 1 0 0 S
0 0 1 1
hold reset / set
Q Q 0
0 1
forbidden inputGated R-S latch
Clock:
• independent periodic reference signal
• allows control over changes in memory values S
R Q
Q
clk Changes only possible if clk is high
But … ?
D flip-flop
clk
D Q Q copies the value on input D at each rising clock edge
→(positive/leading) edge triggered ff
clk D Q
states
Parity checker: state diagram
Design a circuit that provides a high output if and only if the number of 1s received on its input is odd
Idea: 2 states (even and odd)
even
odd
xyz state names [0]
[1]
[uv] output values 0
st state transition 1
0 1
initial state
Parity checker: transition table
even
odd [0]
[1]
0
1
0 1
Q even even odd odd
i 0 1 0 1
Q+ even odd odd
even Q: current state Q+: next state
Q even odd
o 0 1
next state: output:
Q even even odd odd
i 0 1 0 1
Q+ even odd odd even
o 0 0 1 1 transition table:
Q even odd
o 0 1 i=0
even odd
i=1 odd even Q+ state table:
alternative representations
Parity checker: truth table
even
odd [0]
[1]
0
1
0 1
Q even even odd odd
i 0 1 0 1
Q+ even odd odd even
o 0 0 1 1
transition table: choices:
• binary coding of states
• binary coding of in-/outputs
• flip-flop type(s) here:
• even = 0; odd = 1
• ok already
• 1 D flip-flop
i 0 1 0 1
D 0 1 1 0 truth table:
Q 0 0 1 1
o 0 0 1 1
Parity checker: implementation
even
odd [0]
[1]
0
1
0 1
i 0 1 0 1
D 0 1 1 0 truth table:
Q 0 0 1 1
o 0 0 1 1
clk
D Q
i o
expressions:
D = i ⊕Q o = Q
current state next state
Sequential circuits: design trajectory
• state diagram
• transition table
• binary coding of states and i/o, and selection of flip-flops
• truth table
• expressions and optimisation (K-maps, multi-level)
• implementation
Example: vending machine
design a controller for a machine that accepts 5c and 10c coins, and provides coffee if it has received (at least) 15c
[0]0c 00
10 01 [0]5c 00
10 [0]10c 00
10,01 [1]15c xx
01
inputs coded:
x y = 5c 10c 11 is invalid input
Vending machine: transition table
[0]0c 00
10 01 [0]5c 00
10 [0]10c 00
10,01 [1]15c xx
01
5c10c 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 x x
Q+ 0c 10c
5c x 5c 15c 10c x 10c 15c 15c x 15c Q
0c
5c
10c
15c
o 0 0 0 0 0 0 0 0 0 0 0 0 1
transition table contains exactly the same information as the state diagram
Vending machine: truth table
[0]0c 00
10 01 [0]5c 00
10 [0]10c 00
10,01 [1]15c xx
01
5c10c 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 x x
D0D1 0 0 1 0 0 1 x x 0 1 1 1 1 0 x x 1 0 1 1 1 1 x x 1 1 Q0Q1
0 0
0 1
1 0
1 1
o 0 0 0 0 0 0 0 0 0 0 0 0 1 state coding
0c = 00 5c = 01 10c = 10 15c = 11 2 D flip-flops
Vending machine: K-maps
5c
10c x
1 1 1 1
Q0
x 1
1 Q1
1
1 D0:
1
1 x
5c
10c x
1 1 1
1
Q0
x 1
1 Q1
1
1 D1:
1 x
Q0
1 Q1 o:
D0 = Q0 + 10c + 5cQ1
D1 = 10cQ0 + 5cQ1 + 5cQ0 + 5cQ1 o = Q0Q1
don’t cares !?
does it make a difference?
Vending machine: implementation
clk
D0 Q0
5c
clk
D1 Q1
o
5c 5c 10c
10c 5c
Moore machines
combinational logic for next state
combinational logic for outputs flip-flops