Low-voltage gallium-indium-zinc-oxide thin film transistors based logic circuits on thin plastic foil: Building blocks for radio frequency identification application

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Low-voltage gallium-indium-zinc-oxide thin film transistors

based logic circuits on thin plastic foil

Citation for published version (APA):

Tripathi, A. K., Smits, E. C. P., van der Putten, J. B. P. H., Van Neer, M., Myny, K., Nag, M., Steudel, S., Vicca, P., O'Neill, K., Van Veenendaal, E., Genoe, J., Heremans, P., & Gelinck, G. H. (2011). Low-voltage gallium-indium-zinc-oxide thin film transistors based logic circuits on thin plastic foil: Building blocks for radio frequency identification application. Applied Physics Letters, 98(16), [162102]. https://doi.org/10.1063/1.3579529

DOI:

10.1063/1.3579529

Document status and date: Published: 18/04/2011 Document Version:

Accepted manuscript including changes made at the peer-review stage Please check the document version of this publication:

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Low-voltage gallium–indium–zinc–oxide thin film transistors based logic circuits on

thin plastic foil: Building blocks for radio frequency identification application

A. K. Tripathi, E. C. P Smits, J. B. P. H. van der Putten, M. van Neer, K. Myny, M. Nag, S. Steudel, P. Vicca,

K. O’Neill, E. van Veenendaal, J. Genoe, P. Heremans, and G. H. Gelinck

Citation: Appl. Phys. Lett. 98, 162102 (2011); doi: 10.1063/1.3579529 View online: https://doi.org/10.1063/1.3579529

View Table of Contents: http://aip.scitation.org/toc/apl/98/16

Published by the American Institute of Physics

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Low-voltage gallium–indium–zinc–oxide thin film transistors based logic

circuits on thin plastic foil: Building blocks for radio frequency

identification application

A. K. Tripathi,1,a兲E. C. P Smits,1J. B. P. H. van der Putten,1M. van Neer,1K. Myny,2 M. Nag,2S. Steudel,2P. Vicca,2K. O’Neill,3E. van Veenendaal,3J. Genoe,2

P. Heremans,2and G. H. Gelinck1

1

Holst Centre/TNO, High Tech Campus 31, 5656AE Eindhoven, The Netherlands

2

imec vzw, Kapeldreef 75, B-3001 Leuven, Belgium

3

Polymer Vision, High Tech Campus 48, 5656AE Eindhoven, The Netherlands

共Received 12 January 2011; accepted 13 March 2011; published online 19 April 2011; corrected 29 April 2011兲

In this work a technology to fabricate low-voltage amorphous gallium–indium–zinc oxide thin film transistors共TFTs兲 based integrated circuits on 25 ␮m foils is presented. High performance TFTs were fabricated at low processing temperatures 共⬍150 °C兲 with field effect mobility around 17 cm2_{/V s. The technology is demonstrated with circuit building blocks relevant for radio}

frequency identification applications such as high-frequency functional code generators and efficient rectifiers. The integration level is about 300 transistors. © 2011 American Institute of Physics. 关doi:10.1063/1.3579529兴

Since the report of amorphous gallium–indium–zinc oxide 共a-GIZO兲 as a transparent semiconductor for thin film transistors 共TFTs兲 with performances superior to conventional a-Si:H TFTs,1,2 several groups have demon-strated a-GIZO backplanes for next-generation flat-panel displays.3–5Besides backplanes, a-GIZO based logic circuits are also being explored. In 2006, Presley et al.6 reported five-stage ring oscillators based on indium–gallium–oxide. The five-stage ring oscillators operated at a frequency of 2.2 kHz with the gate and drain of the load transistor biased at 30 V. Ofuji et al.7 demonstrated GIZO inverters and even a five-stage ring oscillator on unheated glass substrates. Discrete TFTs fabricated alongside the integrated circuits exhibited a channel mobility and threshold voltage of 18 cm2_{/V s and +3.7 V, respectively. The maximum}

oscil-lation frequency of the ring oscillator circuit was 410 kHz at a supply voltage of 18 V. More advanced examples are high-speed driver/peripheral display circuits, yielding so-called “system-on-panel,”8 and all oxide nonvolatile memories ei-ther in the form of an a-GIZO floating-gate9or in the form of addressing circuits to program and read NiO resistivity switching memory nodes.10 Less explored are radio fre-quency identification共RFID兲 circuits based on a-GIZO TFTs, even though also for this application the high mobility and optical transparency of a-GIZO TFTs are important at-tributes.

For discrete devices, several research groups have shown that it is also possible to get high-quality transistors at tem-peratures of 150 ° C, and lower.11–13 These processing tem-peratures, allow for the use of cheap and flexible plastic foil such as polyethylene naphthalate共PEN兲 instead of glass. The operational stability of low temperature TFTs, however, is generally more difficult to achieve than the ones made at higher temperatures. This is one of the reasons why complex circuit are still generally made on glass utilizing the high processing temperatures above 250 ° C.

In this letter, we show that GIZO TFTs with an accept-able spread and stability can be fabricated at low tempera-tures. As a first step toward a functional RFID transponder tag, ring oscillators and rectifiers are demonstrated. Finally a full functional 8-bit code generator comprising of around 300 TFTs operating at a supply voltage 2 V is presented.

Bottom-gate and bottom-contacts geometry was used for TFT fabrication. The transistors were combined into in-tegrated circuits using a four mask process. Because the maximum process temperature was limited to 150 ° C the devices could be made on 25 ␮m thick heat stabilized PEN substrate. The foils were glued to a rigid carrier support during fabrication. After processing, the foils could be detached from the carrier, resulting in a highly flexible plastic foil containing electronic circuits. The gate and source-drain layers and interconnect lines were deposited by e-beam evaporation of gold. The sheet resistance of these ⬃35 nm thick gold layers amounts to 1–2 Ohm/䊐. The semiconductor layer was formed by a 30 nm thick GIZO layer deposited using rf-sputtering. GIZO was deposited from a target with 2:2:1 atomic ratio for Ga:In:Zn. Partial pressure of oxygen inside the sputtering chamber was kept low 共⬍3%兲 in order to achieve TFTs operating at low pro-cessing temperatures.14,15After GIZO deposition a short an-neal step of 15 min at 150 ° C in air was performed. All layers were patterned using standard photolithographic tech-niques. The technology was scale-up to 150 mm laminated foils.16 Figure 1共a兲 shows the photograph of GIZO TFTs and circuits fabricated on 25 ␮m thick PEN foil which is delaminated from the rigid carrier after the complete process-ing.

For RFID tagging applications low-voltage operation is important. It allows increasing the maximum reading dis-tance of passive RFID tags17or enables long product lifetime in active 共battery-powered兲 RFID tags. Reliable low-voltage TFTs can be realized by using a thin gate dielectric with a high dielectric constant. In this work, the gate dielectric was a 100 nm thick layer of Al2O3 that was either sputtered at

a兲_{Author to whom correspondence should be addressed. Electronic mail:}

ashutosh.tripathi@tno.nl.

APPLIED PHYSICS LETTERS 98, 162102共2011兲

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room temperature, or that was grown by atomic layer depo-sition at 120 ° C using trimethylaluminum and H2O as

precursors.18

Typical transfer characteristics of GIZO TFTs with a channel length of 5 ␮m and a channel width of 140 ␮m are presented in Fig. 1共b兲. The field effect mobility was calcu-lated using the standard equation in the linear regime.19 Mo-bility depends on the gate voltage, V_g, and gives an average value of 17 cm2_{/V s at V}

g= 10 V. Typical subthreshold

swing is in the range of 0.25 V/dec. Good current modula-tions with a typical ON/OFF ratio of 108_{were routinely}

ob-tained. To investigate gate bias instabilities in these TFTs, positive as well as negative gate bias stress of 10V was ap-plied on the gate electrode共corresponding to a gate field of ⬃1 MV/cm兲. During the stress, drain and source electrodes were kept at 0 V. Threshold voltage instability depends strongly on the charge trapping as well as the dynamic inter-action between the exposed backchannel and the ambient atmosphere.20 We used 100nm thick rf-sputtered SiO2 layer

to protect the back channel and this resulted in improved stability of TFTs measured in air. The observed threshold voltage shift was less than +0.2 V for positive bias stress and less than ⫺1 V for negative bias stress for an applied gate bias for over 10 000 s. Considering the low duty cycle 共only a few seconds兲 for RFID applications, the threshold voltage shift under the gate bias stress is sufficiently small.

Figure1共c兲shows the mobility histogram for 216 TFTs spread over a 150 mm foil. Figure1共d兲gives the variation in mobility measured over the whole 150 mm wafer. We ob-served a mobility of 17⫾1.8 cm2_{/V s 共⬃10 %兲 and a}

threshold voltage of 1.5 with a variation in 0.5 V averaged over 216 TFTs. Locally an even lower spread in mobility and threshold voltages was observed as depicted in Fig.1共d兲. For example, in the central die a mobility of 19.1⫾0.7 cm2_{/V s}

was obtained which amounts to ⬃4% local spread. The spread in both parameters is sufficiently low for digital inte-grated circuits up to the complexity of an RFID code gen-erator. This is further reflected in the low supply voltage needed to switch on the ring oscillators. In Fig.2共a兲the stage delay time共␶d兲 and output voltage pattern of a 19-stage ring oscillator is shown. A diode-logic configuration was used.21 It operates at 11 kHz with a supply voltage of 2 V. This corresponds to a stage delay of ⬃2.45 ␮s. With increasing the supply voltage to 10V, the oscillation frequency reaches 109 kHz and the stage delay decreased further to⬃0.24 ␮s. The ability to achieve real logic functionality is demon-strated with the fabrication of functional code generators. The n-type metal oxide semiconductor logic circuits were based a sequencer that serializes bits contained in a write once memory. Fixed start and stop sequences were inter-leaved with the programmable pattern. Combinatorial logic and latches based on negated AND gates, as in standard

FIG. 1. 共Color online兲共a兲 Photograph of GIZO TFTs and circuits on 25 ␮m PEN foil delaminated from the Si wafer after complete processing.共b兲 Electrical trans-fer共I_D-V_G兲 characteristics of a-GIZO transistor on foil with a channel length of 5 ␮m and a width of 140 ␮m. The gate voltage was swept between⫺10 and 10 V, and back. The drain voltage was kept constant at 1 V.共c兲 Histogram of mobility measured over 216 transistors 共L=5 ␮m , W = 140 ␮m兲 spread across the 150 mm foil.共d兲 Wafer map of mobility measured over 150 mm foil. !! #$ % & ' ( )$ % & ' ( ! )$ * +,-. /. 0,1 2$ 3 ! ( ' & % ! 6 & 7 % ! 4 89+ 24 3 %!! 6! !! 6! ! :;<. 2)$3 !" #" =% !=( !=& !=! 489+ 243 ! ( ' & % ! :;<. 2<$3 455 > %4 5,+, ?,+. @'=&AB;+C$$%%& ($ $%%)$* $ +,-)$ * ./01 )23* $+, -)$ *

FIG. 2.共Color online兲共a兲 Stage delays 共␶d兲 of 19-stage ring oscillators

mea-sured at different supply voltages, VDD. Channel length was 5 ␮m.

Out-put pattern of a 19-stage ring oscillator at VDD= 5 V is shown in the inset.共b兲

Output pattern of an 8-bit RFID tran-sponder circuit yielding data rates of 6.4 kb/s at 2 V supply voltage. The programmed bit pattern was 01010011.

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complementary metal oxide semiconductor design, was used to build the code generators. The largest circuit generates an 8-bit code with a data transfer rate of 6.4 kbits/s while oper-ating at 2 V. It consists of about 300 transistors and is laid-out with 5 ␮m design rules. Its area is 51.7 mm2_{. An output}

sequence measured on an 8-bit code generator is presented in Fig. 2共b兲. Again, these circuits worked already at very low voltages, i.e., 1.5–2 V.

The low operating voltages open the way to power them with Zn/Mn共1.5 V兲 or lithium-ion type 共3 V兲 thin film bat-teries in an active tag. In a passive RFID tag, however, the circuit is powered via wireless energy transfer from a base station sending electromagnetic radiation to an antenna and a rectifier. The purpose of the rectifier is to create a direct current 共dc兲 from the alternating current 共ac兲 coupled in by an antenna. A rectifier comprises diodes and capacitors. For diodes, two different topologies can be used. Either a vertical 共Schottky or pn-兲 diode or a transistor with its gate shorted to the drain contact. We have chosen to use the transistor with shorted gate-drain node configuration because its fabrication process is similar to that used for the transistors in the digital circuit of the RFID tag. An important parameter for RFID tags is the efficiency of the rectifier. A more efficient rectifi-cation generates the required dc voltage from a smaller ac input voltage which also implies larger reading distances for the RFID tags.11Figures3共a兲and3共b兲show the current volt-age characteristics and rectified dc voltvolt-age as a function of carrier frequency for an ac input voltage of 5 V, respectively. The obtained rectified 4 V is sufficient to drive the transpon-der chip, as it requires only 2 V, at the targeted base carrier frequency of 13.56 MHz. This selected frequency is a stan-dard in Si-based RFID tags, and will therefore enable com-patibility with installed reader systems at 13.56 MHz.

In conclusion, we demonstrated a-GIZO TFTs fabricated on polymer substrate. The low temperature process was scaled up to 150 mm PEN foil. The devices fabricated at low temperature exhibited mobilities and threshold voltage sta-bilities with low transistor parameters spread suitable for complex integrated circuits such as an RFID tag. This was demonstrated with an 8-bit code generator comprising of over 300 TFTs operating at a supply voltage of 2 V.

This work was carried out in the frame of the Holst Centre. The research leading to these results has received funding from the European Community’s Seventh

Frame-work Program共FP7/2007-2013兲 under Grant Agreement No. 246334-2 of the ORAMA project.

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