Switch-Mode class-E Power amplifiers: a contribution toward high performance and reliability

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Switch-Mode Class-E Power Amplifiers:

A Contribution Toward High Performance and Reliability

Ali Ghahremani

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1100 um

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SWITCH-MODE CLASS-E POWER AMPLIFIERS: A

CONTRIBUTION TOWARD HIGH PERFORMANCE AND

RELIABILITY

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SWITCH-MODE CLASS-E POWER AMPLIFIERS: A

CONTRIBUTION TOWARD HIGH PERFORMANCE AND

RELIABILITY

DISSERTATION

to obtain

the degree of doctor at the University of Twente,

on the authority of the rector magnificus,

Prof.dr. T.T.M. Palstra,

on account of the decision of the Doctorate Board

to be publicly defended

on Wednesday 28 October 2020 at 14.45 uur

by

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This dissertation has been approved by:

supervisor

Prof. dr. B. Nauta

co-supervisor

Dr. A.J. Annema

Cover design: Shokoufeh Mardanikorani

ISBN: 978-90-365-5039-0

DOI: 10.3990/1.9789036550390

© 2020 Ali Ghahremani, The Netherlands. All rights reserved. No parts of this thesis may be

reproduced, stored in a retrieval system or transmitted in any form or by any means without permission

of the author. Alle rechten voorbehouden. Niets uit deze uitgave mag worden vermenigvuldigd, in

enige vorm of op enige wijze, zonder voorafgaande schriftelijke toestemming van de auteur.

This work is part of the SHERPAs project (no. 12903) and was

supported by the Netherlands Organization for Scientific

Research (NWO).

Integrated Circuit Design, University of Twente, 7500 AE

Enschede, the Netherlands.

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Graduation Committee:

Chairman / secretary

prof. dr. J. N. Kok

supervisor:

prof. dr. ir. B. Nauta

co-supervisor:

dr. A. J. Annema

Committee Members

prof. dr. ir. F.E. van Vliet

prof. dr. ir. P.G.M. Baltus

prof. dr. J.A. Ferreira

prof. dr. L.C.N. de Vreede

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Abstract

The increasing demands for high data rate necessitate the use of complex modulation schemes that require highly linear transmitters to optimize both the signal quality and the bandwidth usage. These two metrics are usually expressed in terms of error vector magnitude (EVM) and adjacent channel leakage ratio (ACLR). The power amplifiers (PAs), being the last active building block in a transmitter chain, greatly affect the signal quality. Also, typically, PAs are the most power hungry block that have a significant impact on the overall efficiency of a transmitter.

Switch-mode class-E PAs have shown great potential for power efficient amplifi-cation of RF signals. Under certain conditions for the transistor voltage and cur-rent waveforms, this class of PAs provide (ideally) 100% efficiency. Also, due to the switched-mode operation of the transistors, class-E PAs are CMOS-friendly and show only a weak dependency on process variations. However, due to incorporating two tuned tanks, the dependency on the load impedance is relatively large, resulting in e.g. load dependent output power, power efficiency, peak voltages and peak (and average) currents which can lead to reliability issues. Load-mismatch can be due to (unintended) changes in the antenna environment or can be due to (intended) load modulation as with e.g. outphasing systems.

This thesis work aims at high performance and reliable class-E PA. The first part of this thesis presents load pull analyses for class-E RF power amplifiers from a math-ematical perspective, with analyses and discussions of the effects of the most common non-idealities of class-E PAs. This includes the limited loaded quality factor (Qloaded)

of the series filter, switch on-resistance, limited quality factor of the DC-feed induc-tor, load mismatch dependent switch conduction loss and the limited negative voltage excursions (due to e.g. the reverse conduction of the switch transistor for negative voltage excursions). The theoretical findings are backed up by extensive circuit simu-lations and load pull measurements of a class-E power amplifier implemented in 65nm CMOS technology.

Due to switch-mode operation, a single class-E with constant supply only allows phase modulation or On-Off Keying (OOK) modulation. One may use load mod-ulation through outphasing to also enable amplitude modmod-ulation. The second part

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of this thesis presents an analysis of outphasing class-E Power Amplifiers (OEPAs), using load-pull analyses of single class-E PAs. This analysis led to an approach that allows to rotate and shift power contours and rotate the efficiency contours to im-prove the efficiency of OEPAs at deep power back-off, to imim-prove the Output Power Dynamic Range (OPDR) and to reduce switch voltage stress. The theory was vali-dated using a 65nm CMOS demonstration that includes a pcb transmission-line based power combiner.

OEPAs using isolating power combiners and an inverse cosine signal component separator are inherently linear but suffer from low efficiency at power back-off. For high efficiency both at maximum output power and at power back-off, non-isolating power combiners are required. In the third part of this thesis the linearity of OEPAs using non-isolating power combiners is studied theoretically and validated by mea-surement of an OEPA implemented in a standard 65nm CMOS technology using an off-chip transmission-line based combiner. The developed theoretical model for the linearity is then employed to define digital pre-distortion (DPD) parameters for the implemented OEPA. Using this theory-based DPD and without any AM/AM and AM/PM characterizations, the implemented OEPA provides a competitive linearity performance compared to the state of the art OEPAs. -31dB RMS EVM level and below -30dB ACLR were measured for a 13.1dBm 6.25MHz 30Mbit/s 7dB PAPR 64QAM signal with 41.8% drain efficiency and 33.6% power added efficiency.

Finally, this thesis introduces a technique to self-protect/self-heal Class-E PAs against the effects of load variations, with only a minor impact on output power and efficiency. To validate the proposed technique, load-pull measurements are conducted on a class-E PA implemented in a standard 65nm CMOS technology, employing an off-chip matching network, augmented with a fully automated self-protective/self-healing control loop. It is shown that the proposed self-protective PA can reduce its peak switch voltage from 5.4×VDDto below 3.8×VDDfor all load mismatch conditions with

VSWR up to 19:1 while output power and efficiency are not considerably affected. This allows to reduce the class-E PA’s design margins significantly and to choose a higher VDD (to have a higher output power) compared to the case that the

self-protective control loop is disabled. The designed self-self-protective class-E PA provides 17.5dBm measured output power from a 1.2V supply under nominal load conditions (when all the losses of the matching network are included) and the switch voltage is always below the value allowed by the technology for all load mismatch conditions with VSWR up to 19:1.

Overall, this thesis contributes to design of high performance and reliable switch-mode class-E PAs.

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Samenvatting

De groeiende vraag naar hoge datasnelheden vereist het gebruik van complexe mo-dulatieschema’s waarbij zeer lineaire radiozenders nodig zijn om zowel de kwaliteit van het signaal als de bandbreedte te optimaliseren. Deze twee aspecten worden ge-woonlijk uitgedrukt in een Error Vector Magnitude (EVM) en een Adjacent Channel Leakage Ratio (ACLR). Door zijn plaats aan het eind van het signaalpad heeft de eindversterker (Power Amplifier (PA)) een grote invloed op de signaalkwaliteit. Ge-woonlijk is de eindversterker het systeemelement met de hoogste energieconsumptie, waardoor het een significante invloed heeft op de effici¨entie van het gehele zendsys-teem.

Schakelende klasse-E eindversterkers zijn veelbelovend voor het efficiënt verster-ken van radio-frequente (RF) signalen. Onder specifieke omstandigheden voor de transistorspanning- en -stroomgolfvormen kan deze klasse eindversterker (idealiter) 100% efficiëntie behalen. Daarnaast zijn klasse-E eindversterkers door hun gebruik van transistoren die uitsluitend schakelen geschikt voor implementatie in CMOS tech-nologiën, met enkel een zwakke afhankelijkheid van productievariaties. Anderzijds is de afhankelijkheid van de belastingsimpedantie relatief groot door het gebruik van resonantiekringen, met als gevolg dat zowel het uitgangsvermogen als de efficiëntie, piekspanningen en piek- en gemiddelde stromen belastingsafhankelijk zijn, wat kan leiden tot betrouwbaarheidsproblemen. Afwijkingen van de nominale belastingsim-pedantie kunnen ontstaan door (onbedoelde) veranderingen in de elektromagnetische omgeving van de antenne of door (bedoelde) modulatie van de belastingsimpedantie, zoals bij de outphasing techniek.

Deze thesis is gericht op hoogwaardige en betrouwbare klasse-E eindversterkers for radiofrequente toepassingen. Het eerste deel van deze thesis behandelt load-pull analyses voor klasse-E eindversterkers vanuit een wiskundig oogpunt, inclusief behan-deling en discussie van de meestvoorkomde niet-idealiteiten van klasse-E eindverster-kers. Tot deze niet-idealiteiten behoren de eindige belaste kwaliteitsfactor (Qloaded)

van de serieresonantiekring, de aan-weerstand van de schakeltransistor, de eindige kwaliteitsfactor van de resonantiekringspoel, belastingsafhankelijke schakelaardissi-patie en begrenste negatieve spanningsexcursies (door bijvoorbeeld de geleiding van

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de schakeltransistor voor negatieve spanningsexcursies). De theoretische bevindingen worden ondersteund met uitgebreide circuitsimulaties en load-pull metingen aan een klasse-E eindversterker in een 65nm CMOS technologie.

Door zijn schakelende werking kan een enkele klasse-E eindversterker met een constante voedingsspanning alleen fasemodulatie of On-Off Keying (OOK) realiseren. Het gebruik van de outphasing-techniek maakt het gebruikt van amplitudemodulatie en van complexe modulaties mogelijk. Het tweede deel van deze thesis presenteert een analyse van outphasing klasse-E eindversterkers (Outphasing class-E Power Amplifiers (OEPAs)), aan de hand van een load-pull analyse van individuele klasse-E eindver-sterkers. Deze analyse leidde tot een techniek waarbij de vermogenscontours op een Smith-kaart geroteerd en geschoven kunnen worden en waarbij de effici¨entiecontours geroteerd kunnen worden. Hiermee kunnen zowel de effici¨entie van OEPAs bij lage vermogens als de Output Power Dynamic Range (OPDR) verbeterd worden, en kan de spanningsstress op de schakelaar verminderd worden. De theorie is bevestigd door middel van metingen op een 65nm CMOS implementatie die gebruik maakt van een PCB-transmissielijngebaseerde power combiner.

OEPAs die gebruik maken van isolerende power combiners en een inverse-cosinus signaalcomponentscheider zijn inherent lineair, maar hebben lagere efficiëntie bij la-gere uitgangsvermogens. Om hoge efficiëntie te halen bij zowel maximaal als ver-laagd vermogen zijn niet-isolerende power combiners nodig. In het derde deel van deze thesis word de lineariteit van dergelijke OEPAs theoretisch onderzocht en ge-verifiëerd aan de hand van metingen aan een OEPA in een standaard 65nm CMOS technologie, gebruikmakend van een off-chip transmissielijn-gebaseerde power com-biner. Het ontwikkelde theoretisch model betreffende de lineariteit word vervolgens gebruikt om digitale pre-distortie (Digital Pre-Distortion (DPD)) parameters te de-finiëren voor de ge¨ımplementeerde OEPA. Met enkel deze theorie-gebaseerde DPD, zonder gebruik te maken van gemeten AM/AM en AM/PM vervormingskarakterisa-tie, haalt de ge¨ımplementeerde OEPA een hoge lineariteit, vergelijkbaar met de beste huidige OEPAs. Een RMS EVM niveau van -31dB en een ACLR lager dan -30dB werden gemeten voor een 13.1dBm 6.25MHz 30Mbit/s 7dB PAPR 64QAM signaal met 41.8% drain efficiëntie en een 33.6% Power Added Efficiency (PAE).

Als laatste introduceert deze thesis een techniek om klasse-E eindversterkers zich-zelf te laten beschermen/repareren tegen belastingsimpedantievariaties, zonder sig-nificante impact op het uitgangsvermogen en of de effici¨entie. Om deze techniek te verifi¨eren zijn metingen gedaan op een klasse-E eindversterker ge¨ımplementeerd in een standaard 65nm CMOS proces. Deze eindversterker maakt gebruik van een off-chip matching-netwerk en is uitgebreid met een volledig automatische zelf-beschermende/zelf-repareren regellus. Deze versterker kan zijn piekschakelspanning verlagen van 5.4xVDD

tot minder dan 3.8xVDDvoor alle belastingsimpedantieomstandigheden met een VSWR

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Dit maakt zowel een reductie in de benodigde ontwerpmarges van klasse-E PAs mo-gelijk, alsmede een verhoging van de voedingsspanning (met bijbehorende uitgangs-vermogenverhoging). De ontworpen zelf-beschermende klasse-E eindversterker levert (gemeten) 17.5dBm uitgangsvermogen uit een 1.2V voeding onder nominale condi-ties (waarbij het vermogensverlies van het matching-netwerk is inbegrepen) terwijl de schakelaarsspanning voor alle belastingsimpedantieomstandigheden met een VSWR tot 19:1 lager blijft dan de door de technologie maximaal toegestane waarde.

Met deze innovaties levert het werk dat beschreven is in deze thesis een bijdrage aan het ontwerp van hoogwaardige en betrouwbare schakelende klasse-E eindverster-kers voor radiofrequente toepassingen.

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Chapter 1 Introduction

Radio frequency power amplifiers (RF PAs) are the most power hungry building blocks in transmitter chains. PAs are used to convert dc (supply) power into a desired level of modulated RF output power specified by the target application/standard. PAs, while (seemingly) simple at the schematic level, are not just linear amplifiers that are driven into saturation. In fact there are different types of amplification techniques employed by different PA configurations [1].

With the introduction of silicon bipolar transistors at the end of the 60s, solid-state RF PAs started to replace the old-fashion vacuum tube PAs. Nowadays several solid-state technologies are available for both discrete (such as GaAs) and integrated (such as thick-oxide or LDMOS transistors offered by CMOS technology) implementations of PAs. In this thesis the focus is on integrated CMOS PAs.

Dealing with complex modulated signals in modern communication systems, such as Orthogonal Frequency Division Multiplexing (OFDM) or 64 Quadrature Amplitude Modulation (QAM) [2–4], imposes difficult design challenges on designing efficient PAs. In particular, there is a widely accepted trade-off between PA linearity and efficiency. Intrinsically so-called linear PAs, such as class-A PAs, can perform linearly but the efficiency of such PAs is at best 50%. On the other hand switch-mode class-E PAs are non-linear PAs that can provide up to (ideally) 100% efficiency [1]. Over the past decades significant effort has been put into attempts at breaking the trade-off between linearity and efficiency of PAs [1] by e.g. using a switch-mode PAs along with linearization techniques. For instance by using class-E PAs in an outphasing structure, linear operation can be provided with (ideally) 100% efficiency at maximum output power as well as at deep power back-off [5].

So far many RF transmitter blocks have been implemented successfully in CMOS. For PAs, despite the currently existing types of implementations, some remaining issues still need to be addressed. For example, the design of a PA can be challenging

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when it comes to practical applications. For example the antenna impedance, which normally is considered to be constant, can vary strongly [6,7]. For linear PAs, such as class-A PAs with input power control to ensure that the PA keeps operating as a linear PA, it is shown that this can degrade the output power and the PA efficiency while the reliability is not compromised. However, at the start of the research described in this thesis, the effect of load-mismatch on performance and reliability of switch-mode class-E PAs was largely unknown.

This chapter serves as an introduction into this thesis and provides some general concepts related to RF PAs that will be used in the next chapters. Discussions on antenna mismatch, complex modulation schemes such as 64 QAM and the challenges that are imposed in PA design are briefly reviewed. For more information we refer to [2–4].The outline of this thesis is also given in this chapter.

1.1 Power Amplifiers: General Definitions

In this section some general definitions relating to PAs and used throughout this thesis are reviewed. For more comprehensive details we refer the readers to [1, 4].

A simplified schematic of a PA is shown in Fig. 1.1(a). A matching network is used to provide the optimum impedance1 _{for the PA to deliver the desired output power}

(Pout) into the load for a supply voltage VDD. There are two different definitions for

the efficiency, Drain Efficiency (DE) and Power Added Efficiency (PAE), defined as DE = Pout Ps (1.1) PAE = Pout Ps+ Pin (1.2) where Ps is the supply power and Pin is the input power required to drive the PA.

For high order amplitude modulated signals, such as 64 QAM, linear PAs are required. In this work we consider narrow-band applications; for which the memory (dynamic) effects can be neglected and the desired relation between the input and output phasors Vin and Vout, respectively, can be written as (Fig. 1.1(a))

Vout = K · Vin (1.3)

where K is a complex constant factor. However, due to incorporating active, intrin-sically non-linear devices in PAs (i.e. transistors), the complex factor K is not con-stant and both its amplitude and phase is signal dependent yielding distortion. These dependencies are (conventionally) characterized by the AM/AM and AM/PM distor-tions, which represents respectively the amplitude and phase of the (ideally) constant

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1.2. RF Antennas

V

DD Matching Network Pout Ps Pin PA Vin Vout (a) Vin Vout PA AM(Vin) PM(Vin) Pre-distortion AM-1(Vin) PM-1(Vin) Linear (b)

Figure 1.1: (a) Top level schematic of a PA. (b) Concept of pre-distortion.

K as a function of input amplitude |Vin| or input power Pin. These characterized

AM/AM and AM/PM information, then subsequently, can be used to pre-distort the PA, shown in Fig. 1.1(b), to provide a linear operation and to have a linear amplified replica of the input signal at the PA’s output. Yet, to show the performance of the pre-distortion, other metrics such as Adjacent Channel Leakage Ratio (ACLR) and Error Vector Magnitude (EVM) are used (will be discussed later in this chapter).

1.2 RF Antennas

Since the first practical demonstration of wireless technology by Guglielmo Marconi in 1901, antennas have become key building blocks of transmitters. An antenna is a single device that allows for transmission of RF energy through free space. Nev-ertheless, in many instances, not so much attention is paid to them in the system design.

Antennas, in the initial RF system design phase, are modeled by a constant (typ-ically) 50Ω impedance [4]. At the transmitter side of a wireless system, a PA is required to drive the antenna. In order to achieve maximum energy transfer between the PA and the antenna, the input impedance of the antenna must match the output impedance of the feeder2_{that drives the antenna. Otherwise, a reflected wave will be}

generated at the antenna side that travels back to the PA and can degrade the overall performance of the transmitter.

The radiation pattern of the antenna describes the relative strength of the radiated field in various directions from the antenna at a constant distance. Any object placed

2_{The feeder can be the PA itself or a transmission line/matching network that are typically used}

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in the near field of the antenna will alter its radiation pattern and as a result will change the antenna impedance [6, 7].

A common measure of the quality of matching between an antenna and the trans-mission line (that feeds the antenna) is the Voltage Standing Wave Ratio (VSWR) [8]. For this, we first need to introduce the reflection coefficient at the feed point of the antenna (ΓZA) which is defined as the fraction of the (incident) power Pi that is

reflected (Pr) from the antenna. For the schematic of Fig. 1.2(a), it can be shown

that [8] ΓZA = Pr Pi = ZA− 50Ω ZA+ 50Ω (1.4) where ZAis the antenna impedance when the environment interacts in the near field

of the antenna and the 50Ω is the ideal (typical) antenna impedance. For any ZA

with Re{ZA} >= 0, we have |ΓZA| ≤ 1.

The non-zero reflected power from the antenna creates standing waves along the transmission line [8] with amplitude depending on the distance l from the antenna. VSWR is defined as the ratio of the peak amplitude of the standing wave to its minimum amplitude, shown in 1.2(b). It can be shown that [8]

VSWRZA =

1 + ΓZA

1 − ΓZA

(1.5) For a matched antenna ZA= 50Ω, ΓZA= 0 and VSWRZA = 1.

Pi Pr 50 ZA From PA/ matching network (a) l ₀ (b) min max V o lt a g e a m p li tu d e l

Figure 1.2: (a) Antenna and its 50Ω feeder. (b) Illustration of VSWR. Amplitude of the standing wave depends on the distance l from the antenna.

A common method to represent impedances is to use the Smith chart represen-tation. The Smith chart can be used to simultaneously display multiple parameters including impedances, admittances, constant power and efficiency contours and re-gions for safe operation of a PA. For this, all these parameters should be translated into reflection coefficients. In this thesis we use Smith chart frequently which is shown in Fig. 1.3 in detail. In the remainder of this thesis we drop the details for simplicity.

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1.2. RF Antennas 0.1 0.1 0.1 0.2 0.2 0.2 0.3 0.3 0.3 0.4 0.4 0.4 0.5 0.5 0.5 0.6 0.6 0.6 0.7 0.7 0.7 0.8 0.8 0.8 0.9 0.9 0.9 1.0 1.0 1.0 1.2 1.2 1.2 1.4 1.4 1.4 1.6 1.6 1.6 1.8 1.8 1.8 2.0 2.0 2.0 3.0 3.0 3.0 4.0 4.0 4.0 5.0 5.0 5.0 10 10 10 20 20 20 50 50 50 0.2 0.2 0.2 0.2 0.4 0.4 0.4 0.4 0.6 0.6 0.6 0.6 0.8 0.8 0.8 0.8 1.0 1.0 1.0 1.0 20 -20 30 -30 40 -40 50 -50 60 -60 70 -70 80 -80 90 -90 100 -100 110 -110 120 -120 130 -130 140 -140 150 -150 160 -160 170 -170 180 ± 90 -90 85 -85 80 -80 75 -75 70 -70 65 -65 60 -60 55 -55 50 -50 45 -45 40 -40 35 -35 30 -30 25 -25 20 -20 15 -15 10 -10 0.04 0.04 0.05 0.05 0.06 0.06 0.07 0.07 0.08 0.08 0.09 0.09 0.1 0.1 0.11 0.11 0.12 0.12 0.13 0.13 0.14 0.14 0.15 0.15 0.16 0.16 0.17 0.17 0.18 0.18 0.19 0.19 0.2 0.2 0.21 0.21 0.22 0.22 0.23 0.23 0.24 0.24 0.25 0.25 0.26 0.26 0.27 0.27 0.28 0.28 0.29 0.29 0.3 0.3 0.31 0.31 0.32 0.32 0.33 0.33 0.34 0.34 0.35 0.35 0.36 0.36 0.37 0.37 0.38 0.38 0.39 0.39 0.4 0.4 0.41 0.41 0.42 0.42 0.43 0.43 0.44 0.44 0.45 0.45 0.46 0.46 0.47 0.47 0.48 0.48 0.49 0.49 0.0 0.0 A N_G LE_O F T_R A N SM IS SIO N C O EF FIC IE N T IN D EG R EE S A N_G LE_O F R EF LE_C TIO N C O EF FIC IE N T IN D EG R EE S — > W AV ELEN G TH S TO WA RD G ENER ATO R — > <— W A V EL EN G TH S TO W A R D L O A D < — IND UC TIV E RE ACTA NCE CO MPO NEN T (+jX /Zo), OR C APAC ITIVE SU SCEPT ANCE (+jB /Yo) CA PA CIT IV E R EA CT AN CE CO MP ON EN T ( -jX /Z o) , O R IN D U CT IV E SU SC EP TA N C E (-jB /Y o)

RESISTANCE COMPONENT (R/Zo), OR CONDUCTANCE COMPONENT (G/Yo)

RADIALLY SCALED PARAMETERS

TOWARD LOAD —> <— TOWARD GENERATOR

1.1 1.2 1.4 1.6 1.8 2 2.5 3 4 5 10 20 40 100 SWR 1 ∞ 1 2 3 4 5 6 8 10 15 20 30 40 dBS 1 ∞ 1 2 3 4 5 7 10 15 ATTEN. [dB] 1.1 1.2 1.3 1.4 1.6 1.8 2 3 4 5 10 20 S.W. LOSS COEFF 1 ∞ 0 1 2 3 4 5 6 7 8 9 10 12 14 20 30 RTN. LOSS [dB] ∞ 0.01 0.05 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 RFL. COEFF, P 0 0.1 0.2 0.4 0.6 0.8 1 1.5 2 3 4 5 6 10 15∞ RFL. LOSS [dB] 0 1.1 1.2 1.3 1.4 1.51.6 1.7 1.8 1.9 2 2.5 3 4 5 10 S.W. PEAK (CONST. P) 0 ∞ 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 RFL. COEFF, E or I 01 0.99 0.95 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 TRANSM. COEFF, P CENTER 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 TRANSM. COEFF, E or I 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 ORIGIN

Smith Chart

Figure 1.3: An impedance Smith chart (with no data plotted). [9]. Constant real and imaginary contours are shown.

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Basically, Smith chart is a unit-radius circle that each point at or within this circle corresponds to a reflection coefficient Γ (note that |Γ| ≤ 13_{). Using (1.4), the center}

of the Smith chart (Γ = 0) corresponds to ZA = 50Ω, matched antenna. At the

right (left) hand side, Γ = 1 (Γ = −1) hence ZA → ∞ (ZA = 0), an open (short)

circuit at the antenna feed point and at the upper/lower side of the horizontal axis the imaginary part of the antenna impedance is positive/negative (inductive/capacitive). For more details, we refer the interested reader to e.g. [8].

1.3 BPSK modulation

Let us assume we wish to transmit a baseband data, toggling between -1 and 1, as shown in Fig. 1.4(a). We can simply use a carrier at frequency ω0and e.g. modulate

its phase (shown in Fig. 1.4(a)). The resulting signal is denoted as Phase Shift keying (PSK) or Binary PSK (BPSK).

+1

-1

time time time

Ts (a) 0 +1 -1 0 +1 -1 (b) (c)

Baseband data Carri er Modul ated carri er

bn bn

Figure 1.4: (a) Generation of BPSK signals. Signal constellation for (b) ideal and (c) noisy BPSK signal [4].

To visualize modulation schemes and the effect of nonidealities on them, signal constellations are used. For example, for the BPSK modulation of Fig. 1.4(a), we have

xBP SK= bncos(ω0t); bn ∈ {−1, 1}. (1.6)

The BPSK signal has cosine function as its basis function and can be fully character-ized by possible values of the symbols bn, shown in Fig. 1.4(b) and are denoted as the

3_{The Smith chart is most frequently used at or within the circle. However, the remainder is still}

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1.4. Modulation bandwidth issues and Pulse shaping

signal constellation. In practice, to plot the constellation diagram of signals used in a communication link, the signals are demodulated at the receiver and the baseband data waveforms similar to e.g. Fig. 1.4(a) are reproduced and sampled at Ts/2 and Ts

is (information) pulse width. Any nonidealities such as distortion of the transmitters or noise at the receiving side of the communication link make the constellation points to look fuzzy (Fig. 1.4(c)).

1.4 Modulation bandwidth issues and Pulse

shap-ing

The BPSK modulation scheme with the square wave baseband pulse shaping, shown in Fig. 1.4(a), suffers from two issues. Firstly, due to the sharp transition of the time domain baseband signal the energy (of the signal) is spread over an infinite bandwidth. However, the communication channels that the signal is being transmitted through are band limited. As a result, for the BPSK input signals, the output of these channels exhibit an exponential tail in time domain that becomes longer as the channel bandwidth (BW) decreases. Then at the sampling moments, at the receiver to determine each symbol (-1 or +1), the resulting value is corrupted by decaying tails created by previous symbols. This effect is called Intersymbol Interference (ISI) [4].

Secondly, performing Fourier analysis results in a sinc-shaped Power Spectral Density (PSD) of the signal, shown in Fig. 1.5(a); the signal has a considerable amount of energy in the side lobes of the sinc function. In communication standards the energy of the signal must be confined to channel BW. For a channel with BW = 2/Ts, even if the resulting ISI (due to small BW of the channel compared to the BW

of the signal) can be accepted, the side lobes of the sinc function fall outside the channel and normally are restricted by the standards.

To resolve these issues, the BW of the baseband signal should be reduced before up conversion and transmission through the communication channel. The tightest spectrum can be obtained by using time domain sinc pulses, shown in Fig. 1.5(b). The resulting PSD of the sinc pulse shaping is (only) non-zero within BW = 1/Ts.

Furthermore, at the receiver side, by sampling at exactly integer multiples of Ts, the

ISI can be eliminated (all other pulses have a zero-crossing at these sample points). Yet, a small timing error at the sampling moments can cause a large ISI due to small roll-off of the sinc function by time.

A common pulse shape addressing this issue, denoted as raised−cosine and shown in Fig. 1.5(c), is expressed in time domain as follows

p(t) = sin(πt/Ts) πt/Ts cos(παrt/Ts) 1 − 4α2 rt2/Ts2 (1.7)

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where the parameter αr is the so-called roll-off factor and determines how close p(t)

is to a sinc function in time domain. For αr = 0, the pulse reduces to a sinc pulse.

The parameter αris also, sometimes, called as excess BW as it shows how much extra

BW the shaped pulse requires compared to a sinc pulse.

+1 -1 time Ts (b) (a) Ts 1 Ts 2 0 2Ts 1 2Ts -1 0 time time frequency frequency frequency 2Ts -(1-αr) 2Ts -(αr+1) 2Ts 1+αr 2Ts 1-αr Ts 0 2Ts Ts 2Ts 0 (c) +1 +1 PSD(f) PSD(f) PSD(f)

Figure 1.5: (a) BPSK signals and its spectrum. (b) Sinc pulse and its spectrum. (c) Raised-cosine pulse and corresponding spectrum [4].

1.5 Quadrature Amplitude Modulation (QAM)

Quadrature modulation is a technique to improve the throughput of communication links (for a given channel bandwidth) by using two orthogonal carriers, for our appli-cations, cos(ω0t) and sin(ω0t). For the case of binary baseband data, the concept is

illustrated in Fig. 1.6(a). A serial-to-parallel (S/P) converter separates the even- and odd-numbered bits and each group of bits is carried by one of the orthogonal carriers. Quadrature modulation reduces the occupied BW by a factor of two or, it enhances the throughput by a factor of two compared to single-carrier modulation case for the same BW. This is simply because the S/P converter stretches each bit duration by a

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1.6. Spectral Regrowth

factor of two before modulating the carriers.

To obtain the constellation diagram, the output signal x(t) in Fig. 1.6(a) can be written as x(t) = b2ncos(ω0t) + b2n+1sin(ω0t), where n is the input bits’ index and

{b2n, b2n+1} ∈ {−1, 1}. Using two orthogonal axes for the two orthogonal carries, the

constellation diagram of Fig. 1.6(b) can be drawn. The horizontal axis (corresponding to the cosine carrier) is denoted by I (for in-phase) and the vertical axis (corresponding to the sine carrier) is denoted by Q (for quadrature). Each constellation symbol, corresponding to two consecutive bits, carries two bits. This modulation scheme, then, is denoted as 4 QAM (QPSK is also used in literature because this is the quadrature version of (binary) PSK).

Allowing the input data take more amplitude levels (not only {−1, +1}), higher QAM signals can be created. For {b2n, b2n+1} ∈ {±0.5, ±1.5, ±2.5, ±3.5}, we obtain

a 64 QAM signal, of which the corresponding constellation diagram is shown in Fig. 1.6(c). For this constellation diagram, six consecutive bits in the binary baseband stream are grouped and, accordingly, each quadrature component of the carrier is allowed to have eight possible amplitudes. Then, each constellation symbol carries six bits.

1.6 Spectral Regrowth

For a communication channel with bandwidth BWch, to transmit at symbol rate

1/Ts, where BWch = 1/Ts, sinc pulse shaping is necessary to limit out of channel

transmission. Yet, for a better ISI performance, raised-cosine pulse shaping is more popular and a roll-off factor αrresults in an excess BW by a factor of αr. For example,

the PSD of a 64 QAM amplitude modulated signal with raised-cosine pulse shaping with αr= 0.25 and 10MSymb./sec data rate (60Mbit/sec) and 12.5MHz bandwidth

(25% excess BW) is shown in Fig. 1.7(a). It can be seen that, almost, the whole energy of the signal is inside the (for this example) 12.5MHz communication channel. For an amplitude modulated signal such as 64 QAM, any distortion in the transmit path can result in spectral regrowth, i.e. out-of-channel emissions. To illustrate the underlying mechanism, consider an amplitude modulated signal x(t) applied to a nonlinear system that exhibits a third-order memoryless nonlinearity. Writing x(t) as x(t) = xI(t) cos(ω0t) + xQ(t) sin(ω0t) (1.8)

where xIand xQare the baseband I and Q components. At the output of the nonlinear

system y(t) = a3x3(t) + ... = a3x3I(t) cos(3ω0t) + 3 cos(ω0t) 4 − a3x 3 Q(t) − cos(3ω0t) + 3 sin(ω0t) 4 (1.9)

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S/P

X

cos(ω0t ) sin(ω0t ) Binary data A B +

-+

Binary data A B (a) x(t) I Q (b) I Q (c) time

Figure 1.6: (a) illustration of QAM concept. Constellation diagram for (b) 4 QAM (QPSK) and (c) 64 QAM signal [4].

Then the output signal contains the spectra of x3_I(t) and x3_Q(t), centered around ω0

on top of the spectra of the desired signal components xI(t) and xQ(t). Since these

components exhibit a broader spectrum than those of xI(t) and xQ(t), the resulting

output spectrum of an amplitude modulated signal that passes through a nonlinear system grows.

In practice, it is not possible to design a perfectly linear system (there is always a residual amount of nonlinearities in a system that has a power gain > 1). In communication standards, maximum limits are specified for the power that can be transmitted out of the allocated channel. These limits are given as a function of frequency and in dB (normalized to maximum PSD inside the channel) and denoted as Adjacent Channel Leakage Ratio (ACLR) (also called output transmit mask). For example, the output transmit mask of the IEEE802.11a standard is shown in Fig. 1.7(b).

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1.7. Error Vector Magnitude (b) -100 -80 -60 -40 -20 0 12.5MHz (a) Frequency (MHz) 30 20 11 9 0 -20 -28 -40 ACLR (dB)

Figure 1.7: (a) PSD of a 64 QAM amplitude modulated signal with

10MSymb./sec symbol rate (60Mbit/sec bit rate) and 12.5MHz bandwidth (sam-pling frequency is 8GS/sec). (b) the IEEE802.11a ACLR mask.

1.7 Error Vector Magnitude

For the BPSK modulation scheme, it was discussed that any nonidealities at the transmitters or recievers make the constellation points deviate from their ideal loca-tions. The Error Vector Magnitude (EVM) is a measure that shows the deviation of constellation points of the modulated signal with respect to the ideal constellation points and is normally reported both in percentage and in dB (Fig. 1.8). In practice, to obtain the EVM, a constellation diagram based on a large number of detected sam-ples (say Ns) is constructed and the error vectors ei, i = 1,2,...,Ns (drawn between

each measured point and its ideal position) are obtained. The EVM is defined as the rms magnitude of the error vectors normalized to the signal rms voltage Vrms [4]

EVM(%) = 100 × qP ie2i Ns Vrms (1.10) The requirement on the EVM is normally given in the regulation documents of the target application.

1.8 Peak to Average Power Ratio (PAPR) of

mod-ulated signals

PAPR is the ratio of peak power to the average power of a signal and is expressed in units of dB. High order amplitude modulated signals, such as 64 QAM, exhibits

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P

error

I

Q

P

ref

Ideal

Measured

AM/AM

AM/PM

Figure 1.8: Illustration of EVM and the effect of AM/AM and AM/PM distor-tions on the constellation points.

high PAPR, i.e., the signal can have peaks that are much larger than the signal Root Mean Square (RMS) value. For transmission of such peaky signals, the PAs need to be designed to provide the peak power but are mainly operating at (the much lower) average output power. In the next chapter we will see that pushing PAs to operate at lower than peak power (in back off) results in a lower PA efficiency compared to that at peak output power.

As an example, a simulated Probability Density Function (PDF) of a 64 QAM signal (with raised-cosine pulse shaping, 12.5MHz BW and αr = 0.25) is shown in

Fig. 1.9 as a function of power back-off (normalized to peak power). The average power of the signal is 7dB below its peak level, i.e. PAPR=7dB. PAPRs for different QAM levels (with raised-cosine pulse shaping, 12.5MHz BW and αr= 0.25) are given

in Table 1.1. It can be seen that, by increasing the QAM level to achieve higher communication speeds, the PAPR increases that can result in a (potentially) poor efficiency for the PA.

Table 1.1: PAPR for different QAM levels.

QAM level 4 16 64 156 PAPR (dB) 4.9 6.1 7 7.6

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1.9. Thesis organization -30 -25 -20 -15 -10 -5 0 0 0.002 0.004 0.006 0.008 0.01 Average Power PAPR 7dB Normalized Power (dB) P D F

Figure 1.9: Simulated PDF of 64 QAM signal with raised-cosine pulse shaping and αr= 0.25.

1.9 Thesis organization

The thesis work aims at high performance and reliable CMOS PAs. Various PA classes are briefly reviewed in chapter 2. The chapter also provides the rationale behind our choice of class E PAs as the PA configuration of choice and outphasing for linearization of this class of PA.

Antenna load-mismatch is a major external effect that can impact PAs perfor-mance and reliability. In chapter 3 we briefly discuss load-pull study of linear class A PAs as an introduction into class E PA load-pulling. Also transistor break-down mechanisms under higher than nominal voltage and current excursions are reviewed. Traditionally, isolators/circulators were used to isolate the PA from mismatch at the antenna. However, their associated loss makes them unsuitable for use in high-efficiency PA systems. To remove the necessity for these bulky components, firstly, a clear picture must be provided on the effect of load-mismatch on the performance and reliability of class E PAs. Chapter 4 presents load-pull analysis of class E PAs from mathematical perspective, validated by experimental results.

To be able to use class-E PAs to amplify amplitude modulated signals, the out-phasing technique is used. However, load modulation that is being used to provide high efficiency both at maximum output power and at power back-off, is also a source of load-mismatch that can potentially compromise the reliability of such PAs when used in outphasing configurations. Furthermore, it is shown that the traditional

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mod-eling of PAs as ideal voltage sources cannot be employed to study outphasing systems using class E PAs as branch amplifiers [10].

As a next step, this thesis extends the study of chapter 4 in chapter 5 to provide a theoretical model for outphasing class-E PAs (OEPAs) to study performance aspects such as efficiency, operational bandwidth and output power dynamic range as well as reliability aspects such as maximum switch voltage. This chapter also presents a novel technique to improve the performance and reliability of such PAs under nominal antenna load conditions.

The general model of OEPAs, developed in chapter 5, is employed in chapter 6 to provide a model for the linearity of OEPAs. The provided linearity model was then successfully employed to pre-distort the input signal to the PA without being required to (conventionally) characterize the AM/AM and AM/PM distortions.

The model of the class-E PAs under load-mismatch, provided in chapter 4, is em-ployed in chapter 7 to design a self-protective class-E PAs under heavy load-mismatch conditions. The experimental verifications demonstrate that the PA can maintain its reliability under heavy load-mismatch condition with VSWRs up to 19:1, while the output power and the efficiency are not considerably affected. Chapters 4-7 are refor-matted publications [11–14], respectively. Finally, chapter 8 summarizes this thesis, with recommendations on directions for future research.

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Bibliography

[1] S. Cripps, RF Power Amplifiers for Wireless Communications, 2nd edition, Artech House, 2006.

[2] T. S. Rappaport, Wireless Communications, Principles and Practice, New Jersey: Prentice Hall, 1996.

[3] L. W. Couch, Digital and Analog Communication Systems, Fourth Edition, New York: Macmillan Co., 1993.

[4] B. Razavi, Design of Analog CMOS Integrated Circuits. McGraw-Hill; 2001. [5] M. P. van der Heijden, M. Acar, J. S. Vromans and D. A. Calvillo-Cortes, ”A

19W high-efficiency wide-band CMOS-GaN class-E Chireix RF outphasing power amplifier,” 2011 IEEE MTT-S International Microwave Symposium, Baltimore, MD, 2011, pp. 1-4.

[6] K. Boyle and M. Leitner, ”Mobile phone antenna impedance variations with realusers and phantoms”, Proc. iWAT, pp. 420-423, Hong Kong, 2011.

[7] S. M. Bowers, K. Sengupta, K. Dasgupta, B. D. Parker and A. Hajimiri, ”Inte-grated Self-Healing for mm-Wave Power Amplifiers,” in IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 3, pp. 1301-1315, March 2013. [8] D. M. Pozar, Microwave Engineering. 4th edition, Wiley; 2001.

[9] P. Smith, Electronic Applications of the Smith Chart, Noble Publishing Corpo-ration, 2000

[10] R. Zhang, M. Acar, M. P. van der Heijden, M. Apostolidou and D. M. W. Leenaerts, ”Generalized Semi-Analytical Design Methodology of Class-E Out-phasing Power Amplifier,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 10, pp. 2951-2960, Oct. 2014.

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[11] A. Ghahremani, A. Annema and B. Nauta, ”Load Mismatch Sensitivity of Class-E Power Amplifiers,” in IClass-EClass-EClass-E Transactions on Microwave Theory and Tech-niques, vol. 67, no. 1, pp. 216-230, Jan. 2019.

[12] A. Ghahremani, A. Annema and B. Nauta, ”Outphasing Class-E Power Ampli-fiers: From Theory to Back-Off Efficiency Improvement,” in IEEE Journal of Solid-State Circuits, vol. 53, no. 5, pp. 1374-1386, May 2018.

[13] A. Ghahremani, A. Annema and B. Nauta, ”A +20 dBm Highly Efficient Linear Outphasing Class-E PA Without AM/AM and AM/PM Characterization Re-quirements,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 7, pp. 1149-1153, July 2019.

[14] J. Ponte, A. Ghahremani, M. Huiskamp, A. Annema and B. Nauta, ”Augmen-tation of Class-E PA Reliability under Load Mismatch Conditions,” 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Bordeaux, 2018, pp. 33-36.

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Chapter 2 Power Amplifiers: Methods of

Amplification

Power amplifiers can be grouped into two main categories. The first category is that of the classically linear amplifiers that include class A, B, AB and C. The second category is that of the newer so-called switch-mode amplifiers that include class D, E etc. PAs, normally, provide the maximum efficiency at maximum output power and the efficiency declines for reduced output power. Several topologies have been proposed to maintain high efficiency at power back-off such as Doherty [1], outphasing [2] etc. In this chapter we briefly review the PA classes and different proposed structures to maintain high back-off efficiency. For more information we refer to [3, 4].

This chapter also provides the rationale behind our choice of class E PAs as the PA configuration of choice and outphasing for linearization of this class of PA.

2.0.1 Linear PAs

A simplified schematic of a linear PA is shown in Fig. 2.1. The PA consists of a transistor operating in class A, AB, B or C mode, depending on the fraction of time that the transistor conducts current (denoted by α ∈ [0, 2π] in Fig. 2.1). The transistor is biased to supply voltage VDD through an RF choke and a harmonic trap

may be necessary (for classes AB, B and C) at the transistor output to provide a low impedance path for the harmonics of the drain current. For this purpose, a high-Q tank can be used in parallel with the PA load. For a suitable input power level, maximum power is delivered to the load when the drain current excursion is [0, IM ax]

(for class A PA IM ax is two times the PA bias current) and the drain (collector)

voltage excursion (with 180◦phase shift with respect to drain current) is [0, 2VDD].

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V

DD RFC

R

opt High-Q @ω

i

d

v

d DC-block

v

out

v

in

i

d

I

Max

α

2V

DD

v

d

v

in

α

0

Threshold level of the transistor

ωt

ω:input (angular) frequency

t:time

Figure 2.1: A simplified schematic of a linear PA and corresponding waveforms

for maximum output pwoer. The high-Q filter acts as a short circuit at the

harmonics of the input frequency.

current idas Vout= RoptId1 where [3]

Id1=

IM ax

2π

α − sin(α)

1 − cos(α/2) (2.1)

is the fundamental harmonic. The optimum load Ropt yielding maximum output

power is obtained as

Ropt= VDD/Id1 (2.2)

and for an ideal class A PA (α = 2π) we have Id1 = IM ax/2 = IBias, where IBias is

the bias current of the PA in class A configuration.

Drain Efficiency and Power Utilization Factor (PUF)

To find the drain efficiency (DE) we calculate the power delivered by the supply voltage as Ps= VDD· < id(t) > (< · > stands for averaging) where

< id(t) >=

IM ax

2π

2 sin(α/2) − α cos(α/2)

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Then the DE of the PA for conduction angle α ∈ [0, 2π] is DE = 1 2 α − sin(α) 2 sin(α/2) − α cos(α/2) (2.4) 0 π 0 1 0.5 2π DE PUF Conduction angle (α) A B π/4 -20 -16 -12 -8 -4 0 0 0.5 1 B A Power Back-off (dB) DE (a) (b) D E , P U F

Figure 2.2: (a) RF power relative to Class A (PUF) and DE as a function of conduction angle. (b) Efficiency of class A and class B PAs versus power back-off.

The power-output capability of a PA is defined as the ratio of RF power deliv-ered by a transistor normalized to IM axVM axwhere VM axis the maximum transistor

voltage excursion. The power utilization factor (PUF) is defined as the power-output capability normalized to that if the PA was used in class A regime with the same IM ax and VM ax. Then, from (2.1) and (2.2) and with VM ax = 2VDD, the PUF is

derived as [3]

PUF = 1 π

α − sin(α)

1 − cos(α/2) (2.5)

For class A, AB, B and C PAs we have α = 2π, π < α < 2π, α = π and 0 < α < π, respectively. PAs DE and PUF are shown in Fig. 2.2(a) as a function of conduction angle α. Class A PAs have (at best) 50% efficiency with PUF=1. Class B PAs can enhance efficiency to π/4 ≈79% without any PUF degradation. However, class C PAs enhance the efficiency further at the cost of output power.

Note that the derived and plotted DE in Fig. 2.2(a) is at maximum output power. The DE of all classes of operation reduces when reducing the input drive (and hence the output power) at constant VDD (and constant IB for class A PAs). For

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0 < Vout< VDD can be written as DEA(Vout) = 1 2 Vout VDD 2 (2.6) DEB(Vout) = π 2 Vout VDD (2.7) The DE as a function of power back-off (defined as BF = 10 log(Pout/ max(Pout))) is

shown in Fig. 2.2(b). It can be seen that at 10dB back-off the DE of class A PAs drops to (almost) 5% while class B PAs provide (at best) 25% DE.

Non-ideal effects and PAE

The calculated DE numbers are the maximum achievable numbers for the relevant classes. In practice, there is some drive power needed for proper operation of the PAs. As a result the overall efficiency (or PAE) numbers of the PAs are lower than DE numbers. For linear PAs and at a constant output power, the required drive power increases by reducing the conduction angle. Therefore, at GHz frequencies where the device gain is limitted, class C PAs are less attractive due to poor overall efficiency (i.e. PAE) [3, 5].

Moreover, second order effects such as knee voltage, drain parasitic resistance and capacitance and losses of the passive components impact DE and PAE numbers considerably. For example, in [6], a class AB PA is implemented in a standard 90nm CMOS process with operational BW 5.2 to 13GHz. The measured PAE at 25.2dBm maximum output power is 21.6%. By limiting the operational BW, a better efficiency could be achieved. With proper termination of the second harmonic of the drain current, in [7], the PAE is improved to 28.4% at maximum output power.

Back-off efficiency improvement techniques

To improve the back-off efficiency of linear PAs, several techniques have been pro-posed. The PA supply voltage can be reduced in power back-off; PAs with continuous and discrete supply modulation are denoted as Class G and Class H, respectively. In [8], two voltage supplies are employed to improve back-off efficiency of a class B PA. At 1.8GHz and 27.2dBm maximum output power, the measured PAE is 30% and when the supply is switched to VDD/2, ×2 PAE improvement at 6dB power back-off

was measured.

Another proposed technique in literature utilizes impedance level tuning which can be performed by a tunable matching network [9]. In using this technique the power back-off is achieved by reducing the input drive power while the output voltage amplitude is kept constant by means of tuning the load impedance to higher values (so called load trajectory manipulation or LTM in short). Due to limitations in the

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load tuning range, this technique can be combined with supply modulation technique (of class G PAs) to improve the efficiency of e.g. a class B PA at deep power back-off. In [9] this technique has been employed; the PA achieves 39% DE at +24.6dBm maximum output power level from a 2.8V VDD at 2.4GHz. Employing the proposed

technique, at VDD=1.55V, at 12dB power back-off ×2.2 efficiency enhancement was

measured; 21.8% DE. Other techniques to modulate the load impedance include Do-herty and outphasing systems, which will be discussed in detail later in this chapter.

2.0.2 Class J PAs

True class B operation necessitates a short circuit (for the output to ground) at the harmonics of the operating frequency 1_{. As long as the impedance X}

c of the

device output capacitance C is small enough (Xc≤ Ropt), the output capacitance can

resemble the short circuit for the harmonics and close to classical class B efficiency can be achieved. However, some devices such as GaAs transistors exhibit a small output capacitance. Producing a short circuit at the harmonics for these devices can be challenging at GHz frequencies due to e.g. package parasitics.

In class J PAs, a current profile similar to class B PAs (with α = π conduction angle) is assumed. The output capacitance C, shown in Fig. 2.3, does not act as a short circuit, rather providing an impedance Xc(nf ) at the nth harmonic. A filter

is used at the output to filter out the harmonic content of the load and a complex load is required (compared to real load needed for class B PAs) to achieve efficiencies comparable to those of class B PAs.

V

DD RFC Ropt High-Q id vd vin id Imax=πIDC π 0 IDC jX iR C IDC

Figure 2.3: Class J PA schematic and transistor current waveform.

Class J PAs are studied in [3] in detail. It is shown that for α = π, with a load with a proper imaginary part jX, the maximum efficiency of class B PA (i.e. η = π/4) can

1_{True class B operation can also be achieved by employing classical push-pull structures, however,}

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be achieved for Xcs up to about 2.5Ropt. However, this comes at the cost of a higher

VM ax. By increasing the conduction angle, the maximum efficiency of the class AB

PA with a similar conduction angle is achieved at a higher Xc to Roptratio. In [10],

a class J PA employing LTM to provide the optimum complex impedance at power back-off and including power supply modulation is designed at 2.08GHz using a GaN HEMT transistor with 38dBm output power and above 45% DE over an 8dB power back-off range.

2.0.3 Class F PAs

Considering the drain voltage and current waveforms of a class B PA (α = π) in Fig. 2.1, the power loss (which drops the DE from 100% to 79%) is due to non-zero time-overlap between the voltage and current in the transition. A method to reduce this overlap is to let the drain voltage converge to a square-like waveform by adding some odd harmonics to the drain voltage with appropriate amplitudes and phases. Letting a 3rd order harmonic of the drain voltage appear with relative amplitude 1/6, PA DE can be improved from 79% for class B to 90.7% [3]. Furthermore, this also increases the PUF from 1 for class B PAs to 1.16.

Ideally, the drain current waveform contains only the fundamental and even har-monics and to generate odd harhar-monics, designers rely on the non-linearities and sat-uration in the transistor. Furthermore, to obtain the proper amplitude for the third order harmonic of the drain voltage, a proper impedance should be provided for the corresponding drain current harmonic which makes the output filter for class F PAs more complex than other PAs and as a result less attractive for integrated solutions. Proper impedance termination at odd (higher than 3rd) harmonics, efficiency and PUF can be further improved at the cost of a more complex output filter. Ultimately, by using an infinite number of harmonics, efficiency can be increased to 100% [11].

2.0.4 Class D PAs

A class D PA, in its conventional form, consists of two switches to generate a square drain waveform vd(t), shown in Fig. 2.4, and a high-Q series filter that passes the

fun-damental harmonic to the load, resulting in an output power Pout= (2/π2)VDD2 /Ropt.

Assuming ideal passive components and ideal switches with a zero switch on-resistance and neglecting the power loss associated with charging (to VDD) and discharging (to

0 V) of the parasitic drain capacitance C, class D PAs provide 100% efficiency. Max-imum voltage and current excursions across and through the transistors in a class D configuration are VM ax = VDD and IM ax = (2/π)VDD/Ropt which result in a

power-output capability 1/(π), which is the highest of any PA class [3, 5].

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V

DD High-Q

v

d

v

in

i

R

C

V

DD

R

opt

i

d1

i

R

0 v

d

0 i

d1

I

Max

I

Max

i

R

=I

Max

sin(θ)

θ

v

out

v

out

=(2/π)V

DD

sin(θ)

I

Max

=2V

DD

/(πR

opt

)

<i

d1

(t)>=I

max

/π

η=100%

PUF=4/π

Figure 2.4: Class D PA schematic and waveforms.

width modulation (PWM), suitable for audio applications [12], can be used to design high power multi-watt PAs with (measured) efficiencies as high as 90% at maximum output power. The amplitude of output voltage of a class D PA is proportional to the supply voltage VDD; for amplitude modulation, one can modulate VDD. This

technique is known as envelope elimination and restoration (EER) which is also de-noted as Polar technique (this will be discussed later in this chapter). Employing this technique, in [13], a class D PA is implemented in a standard 130nm CMOS process at 1GHz providing 32% DE at 12dBm maximum output power.

Another technique to apply amplitude modulation to class D PAs is to use the so-called switch capacitor PA (SCPA) structure, shown in Fig. 2.5. The switches and the filter capacitance C0 are divided into N equal size unit elements being controlled

by a control word with N bits. If a control bit bi(i=1,2,...,N) is 1, the ith class D unit

is in on-state and switches the left plate of Cui between 0 and VDD. For bi= 0, the

corresponding unit PA is in off-state and capacitor Cui is connected to ground. The

output voltage amplitude is [14] Vout=

P

ibiCui

C0

VDD (2.8)

For the configuration of Fig. 2.5, N different levels of output amplitude can be realized. The work in [14] is implemented in a standard 90nm CMOS process and has reported a measured PAE of 45% at 25.2dBm output power at 2.4GHz. To improve the back-off efficiency a multi-level supply voltage (Class G SCPA) is employed in [15] and yielding an improvement from 27% (reported in [14]) to 33% in PAE when

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V

DD High-Q

R

opt

v

out

C

0

R

opt

v

out

C

u1

C

u2

C

uN ...

C

u1

=C

u2

= =C

uN

C

ui

=C

0

Figure 2.5: Simplified diagram of an ideal single-ended SCPA.

amplifying 802.11g 64-QAM OFDM signals.

2.0.5 Class E PAs

A simplified schematic of a class E PA is shown in Fig. 2.6. A transistor is employed as a switch controlled by a square-shaped driving waveform. When the switch is the on-state, ideally, vc = 02 and the inductor L is charged by supply voltage VDD.

When the switch goes into off-state, the energy of the inductor propagates toward the load. By proper selection of the component values L and C and the load impedance Ropt+ jX, the drain voltage reaches zero and has zero slope when the transistor

turns on. This eliminates the associated loss with charging the drain capacitance (that impacts class D PAs efficiency). Ideally, a class E PA provides 100% efficiency and a PUF of more than 0.8 [16]. This class of PAs is the subject of this thesis and we will further discuss this class in chapter 4.

2.0.6 Doherty structure

The Doherty amplifier, proposed in [1], is a technique to improve the back-off efficiency of PAs by means of load modulation. The structure, shown in Fig. 2.7(a), consists of two amplifiers; one main (typically A, B or AB) and one auxiliary (typically B or C). At maximum output power and at power back-offs up to (typically) 6 dB both

2_{For consistency with the next chapters, for class E PAs, we use v}

cas the drain/switch/capacitor

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V

DD L Ropt High-Q is vc vin jX iR C vin 0 vc 0 is vout

Figure 2.6: Class E PA schematic and waveforms.

amplifiers contribute to the output power, while for back-off levels of more than 6dB, the auxiliary amplifier shuts down.

For a simplified Doherty structure of Fig. 2.7(b), let’s assume class B operation. A high-Q LC tank was assumed in parallel with the transistors to shunt all the drain current harmonics to ground. Then, the output currents are the first harmonic of the drain currents and the output voltages are the DC-blocked drain voltages. The output current phasors (as a function of the input amplitude) can be written as

Iout1= IM ax 2 |Vin| Vin,M (2.9) Iout2= −j IM ax 2 (2 |Vin| Vin,M − 1); 0.5 < |Vin| Vin,M < 1 = 0; |Vin| Vin,M < 0.5 (2.10)

where Vin,M is the maximum input drive (0dB back-off) and |Vin| = Vin,M/2

corre-sponds to the 6dB power back-off. The definition of IM ax was given in Fig. 2.1 and

the output current (waveform) amplitudes are shown in Fig. 2.7(c). For the quarter wave-length transmission line with characteristic impedance Z0, in Fig. 2.7(b),

Vout1 = jZ0It (2.11)

Vout2 = Vout = −jZ0Iout1 (2.12)

Vout = Ropt(Iout2+ It)/2 (2.13)

Rearranging these equations, for 0.5 < |Vin|

Vin,M < 1, it can be found that

Vout1= 2

Z2 0

Ropt

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λ/4 Main Vin Vout Ropt/2 λ/4 Aux. (a) Vin,M 0 λ/4 Ropt/2 Vout1 + -Iout1 It Iout2 Vout2 + -Vout + -(b) Vin,M/2 IMax/2 IMax/4 Iout1 Iout2

Input drive amplitude

D ra in c u rr e n t a m p li tu d e (f ir s t h a rm o n ic ) Vin,M 0 Vin,M/2 2Ropt Ropt

Input drive amplitude Vout1/Iout1 (c) (d) Vin,M 0 Vin,M/2 VDD VDD/2 Vout1 Vout

Input drive amplitude (e) 0 0 -6 Power back-off (dB) η π/4 50% -10 (f) O u tp u t v o lt a g e a m p li tu d e M a in A m p . lo a d i m p e d a n c e O v e ra ll e ff ic ie n c y Vout1 Vout2 Iout1 Iout2

Figure 2.7: Doherty PA (a) basic configuration, (b) simplified schematic. For class B main and auxiliary amplifiers (c) output current, (d) impedance seen by the main amplifier, (e) output voltage versus input drive. (f ) overall efficiency versus power back-off when main and auxiliary amplifiers are operating in a class B configuration.

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For Z0 = Ropt it follows from (2.9) and (2.10) that the output voltage amplitude

of the main amplifier is constant, Vout1 = RoptIM ax₂ , for 6dB of output power range.

Recalling (2.7)/(2.6), for a class B/A PA with a constant supply voltage, the efficiency can be kept as high as the efficiency at maximum output power level for 6dB of output power range.

The load impedance, seen by the main amplifier for 0.5 < |Vin|

Vin,M < 1 can be

obtained from (2.9) and (2.14) as

Z1= Vout1 Iout1 = 2Ropt   2 |Vin| Vin,M − 1 |Vin| Vin,M  ; 0.5 < |Vin| Vin,M < 1 (2.15)

For higher back-off levels, the auxiliary amplifier is disabled and does not contribute to the output power. In this case, the main PA sees a constant load (no load modulation) 2Ropt. Z1 as a function of input drive voltage amplitude is shown in Fig. 2.7(d). It

can be seen that the Doherty structure modulates the load impedance seen by the main amplifier to keep a constant voltage amplitude over a 6dB output power range to maintain high efficiency. For this back-off range, using (2.12) and (2.9), the output voltage phasor Vout can be written as

Vout= −jZ0Iout1 = −jRopt

IM ax 2 |Vin| Vin,M ; 0.5 < |Vin| Vin,M < 1 (2.16) which shows a linear function of input drive signal. For |Vin|

Vin,M < 0.5, the auxiliary

amplifier is disabled and the output voltage can be readily written as Vout= Vout1 2 ; |Vin| Vin,M < 0.5 (2.17)

Output voltage amplitude Vout and the output voltage amplitude of the main

amplifier as a function of the input drive are shown in Fig. 2.7(e). The Doherty PA can be seen to exhibit linear behavior over the entirety of the shown input driving signal range.

The output voltage of the auxiliary amplifier as shown in Fig. 2.7(e) shows a linear decrease from its maximum value. Therefore, this amplifier cannot maintain its maximum efficiency over the 6dB back-off range. However, by going into back-off, the contribution of the auxiliary amplifier to the output power reduces and therefore the impact on overall efficiency is modest [3]. Assuming class B operation for both the PAs, it can be shown that [3]

η = π 2 ( Vin Vin,max) 2 3( Vin Vin,max) − 1 0.5 < |Vin| Vin,M < 1 = π 4 Vout1 VDD ; |Vin| Vin,M < 0.5 (2.18)