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Metal contacts to lowly doped Si and ultra thin SOI

B. Rajasekharan, C. Salm, R.A.M. Wolters, A.A.I. Aarnink, A. Boogaard, J. Schmitz

MESA+ Institute for nanoelectronics, University of Twente, PO Box 217 7500 AE Enschede, The Netherlands

1. Abstract

We present our investigations on the fabrication of ohmic and Schottky contacts of several metals on lowly doped bulk Si and SOI wafers. Through this paper we evaluate the fabrication of rectifying devices in which no doping is intentionally introduced.

2. Introduction

An increasing part of the semiconductor device community is using SOI wafers for the fabrication of modern CMOS generations (FINFET [1], Schottky barrier transistors [2], (bio-) sensor applications, optical devices and also as test vehicles to study the fundamental properties of 1D and 2D silicon structures. For SOI thicknesses below the Debye length it becomes interesting to study metal-Si contacts for lowly doped Si since the carrier concentration is dominated by the workfunction difference and the background doping of the SOI wafers becomes irrelevant [3]. We have studied the contacts to lowly doped p- and n-type Si wafers as well as p-type doped SOI. The choice of metals was based on our ultimate goal to combine two or more metals that have to be etched selective to each other and selective to Si and SiO2 [3,4].

3. Device fabrication

4 inch SOITEC p-type wafers with original SOI thickness of 340 nm were thinned down to 40 nm by repeated oxidation-etch cycles. Simulations indicate a resulting doping concentration of 6.1013 cm-3. The bulk

wafers were 5 Ω.cm p-type and 10 Ω.cm n-type wafers. The wafer orientation is (100) unless specified otherwise. Figure 1 shows a schematic of the metal-silicon test structure for bulk wafers and SOI wafers. The metals titanium (Ti), titanium-tungsten (TiW), erbium (Er), and palladium-titanium (PdTi(0.5%)) were

Fig.1: Metal Si contacts embedded in 100 nm isolating SiO2

on bulk wafers (left) and planar test structure in SOI.

sputtererd directly after a 1% HF dip. In the latter case 0.5% Ti was added to Pd by co-sputtering to enhance adhesion (fig. 1 (right)). In case of the SOI tests, the two metals can be either equal or different (fig. 1 (left)). The probe needles are positioned far from the actual contact to avoid effects of mechanical stress. The back of the wafers (depending on the wafer type) was metalized with either gold (Au), Al, Pd or Ti to form ohmic contacts.

4. Device characterization

The I-V characteristics of the metal-Si contacts (contact area 200 μm2) were measured for a large temperature

range (0 ºC to 150 ºC) to extract the Schottky barrier height (SBH) and ideality factor depending on the doping type of the wafers. Fig. 2 gives typical I-V behaviour for Pd contacts to two types of Si and the Schottky characteristics for various temperatures. The temperature dependent measurements indicate a good agreement with the analytical thermionic emission model.

nSi

Fig.2: Left: Schottky contact (Pd on n-Si) and ohmic contact (Pd on p-Si); Right: temperature dependent I-V curves used to extract the Schottky barrier height. Measurements are in good aggreement with the analytical model.

Table 1: SBH and ideality factor at room temperature after sputter deposition.

Metal φbn(eV) n φbp(eV) n

PdTi (0.5%) 0.78 1.05 -- --

Ti -- -- 0.55 1.15

TiW -- -- 0.57 1.12

Er -- -- 0.76 1.1

It can be seen from table 1 and fig. 3 that PdTi shows a high SBH with Si and hence good rectification. The barrier heights are in quite good agreement with the theoretical values [5]. On the other hand metals like Ti and TiW have a barrier height that gives a midgap work function and hence poor Schottky behaviour (fig. 3). The poor rectification in case of Ti and TiW could be

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due to a thin interfacial layer of oxide and is a topic of further investigation.

Fig. 3: I-V curves for PdTi on n-Si and Er, Ti, TiW on p-Si. PdTi shows good p-type metal property and Er good n-type metal property. Ti, TiW are poor n-type metals.

5. Thermal considerations

All metal to Si contacts discussed above were subjected to 15 minute exposures to increasing temperatures upto 150 °C, starting at 0 °C in steps of 25 °C. No degradation in the electrical characteristics is observed for all metal to Si contacts on bulk wafers up to a temperature of 150 °C.

Due to the thermal isolation of the BOX layer, self heating is a significant issue for SOI devices. During device manufacturing, sputter depositions can also result in several tens of degrees rise in surface temperature. During 4 minutes sputtering at 500 W, a bulk Si wafer heats up to 60 °C as determined with thermostrip measurements. Thermal calculations have predicted a rise to approximately 120 °C for a SOI thickness of 40 nm [6]. We have observed silicidation of Pd (fig. 4) that occurs during the deposition on SOI, without any anneal or drive-in step. The same conditions on bulk Si wafers do result in pure metal-Si contacts. The formation of palladium silicide is good for forming contacts. However, for our lateral diodes the formation of silicide complicates selective removal, impacting the process integration possibilities.

SOI Pd PdSix SiO2 SOI Pd PdSix SiO2

Fig.4.: Left:HAADF image showing PdSix (~30 nm) formation

due to self heating of ultra thin SOI during PdTi sputter deposition; Right:EDX compositional profile along the arrow shown in left.

6. Aluminum contacts to silicon

Al-Si contacts made with the standard 1% HF dip were compared with Si that underwent additional treatment in

100% HNO3. The later step forms a chemical oxide of

1-1.3 nm as measured by ellipsometry, also reported in literature [7]. The exposure time to 100% HNO3 was

varied between 1 min and 15 h. The thickness of the chemical oxide reaches a saturation value of 1.3 - 1.4nm after 5 min. It has been reported that the introduction of an ultra thin isolating film between the metal and semiconductor can significantly alter the barrier height [8,9]. Figure 5 shows the change from ohmic and p-type Schottky to n-type Schottky contacts for n-Si and p-Si respectively with the introduction of a 1.3 nm chemical oxide (5 min HNO3 treatment). These effects are also

seen on Si(111) and Si(110). The contact resistance increases by a factor of 300 with the introduction of the chemical oxide.

Fig.5: Aluminum to n-Si (left) and p-Si (right) contacts after a 1% HF dip (0nm oxide), 1min HNO3 (1.0nm oxide) and a

5min HNO3 (1.3nm oxide) clean.

7. Conclusion

We have shown that PdTi and Al form good p-type contact metals to n-Si and Er forms good n-type contact metal to p-Si with high SBH. Further improvement is necessary for Ti and TiW contacts to lowly doped Silicon. We observed silicidation of Pd due to self heating of ultra thin SOI during sputter deposition.

Acknowledgement

The authors would like to thank J. Melai and V.M. Blanco Carballo for scientific discussions.

References:

[1] N. Lindert et al., IEEE EDL, 22, p.487, 2001. [2] D. Connelly et al, Appl. Phy. Lett. 88, 012105, 2006. [3] R.J.E. Hueting et al., IEEE EDL, 29(12), p.1367, 2008. [4] B. Rajasekharan et al., Proc. of ULIS, p. 195, 2008. [5] E. H. Rhoderick et al., 2nd ed., Oxford Science, 1988. [6] D. Levy et al., Appl. Phy. A, 35, p. 141, 1984. [7] S. Imai et al., Acta Phys. Slovakia, 55(3), p.305, 2005. [8] T. Nishimura et al., Appl. Phys. Express 1, 051406, 2008. [9] G. Ottaviani et al, Phys. Rev Lett. 44(4), p.284, 1980.

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