An indirect technique for estimating reliability of analog and mixed-signal systems during operational life

This research has been conducted within the ENIAC project ELESIS

An Indirect Technique for Estimating Reliability of

Analog and Mixed-Signal Systems during

Operational Life

Muhammad Aamir Khan, Hans G. Kerkhoff

University of Twente, Centre of Telematics and Information Technology (CTIT), Enschede, the Netherlands

m.a.khan / h.g.kerkhoff@utwente.nl Abstract— Reliability of electronic systems has been

thoroughly investigated in literature and a number of analytical approaches at the design stage are already available via examination of the circuit-level reliability effects based on device-level models. Reliability estimation during operational life of an

electronic system still lacks a solution especially for analog and

mixed signal systems. The current work will present a novel technique for indirectly estimating reliability during operational life of an electronic system. Reliability simulations during the design stage of a potential critical performance parameter, sensitive to aging effects, over a range of input-stress voltages and working-stress temperatures have been used to generate a set of degradation values per unit time. These values are then used at the system level to estimate the degradation in that particular performance parameter and hence system reliability by regularly monitoring the input-stress voltages and working-stress temperatures. The simulation results conducted for an example target system in a LabVIEW environment show that the proposed technique is viable.

Keywords- reliability; input signal monitoring; temperature monitoring, time before failure, offset voltage

I. INTRODUCTION

In aging sensitive technology nodes, the negative bias temperature instability (NBTI) is one of the major reliability degradation mechanisms that determine the lifetime of CMOS devices and systems. It occurs if a p-type MOS device is stressed with negative bias at elevated temperatures. Due to the NBTI effect the threshold voltage ( ) of the device will increase temporary which in turn can result in the temporal degradation of the system behavior/performance. This degradation is strongly dependent on the time period during which the stressors have been applied.

In order to investigate the effects of these degradations on systems, design-stage simulations based on device-level models have been thoroughly investigated in literature [1-6]. Mostly work has been done for digital systems, therefore the focus of the current paper will be on analog and mixed-signal systems. Some of these analytical approaches also include indirect ways of estimating the reliability of circuits. For example digital circuit delay [7], maximum frequency

degradation of ring oscillators [8], and total standby circuit leakage current (IDDQ) [9, 10] have been used as potential reliability estimators of digital systems.

Usually, reliability estimations during design time have been frequently used to safely guardband the system performance for a certain lifetime. However, reliability estimations during the operational life of a system are crucial for dependable system design which includes repair. Unfortunately, literature for estimating reliability during the operational life of a system is very rare. This necessitates the need of a methodology or a technique either by directly monitoring the performance or by using indirect means for estimating reliability during the operational life; this especially holds for analog and mixed-signal systems. Embedded instruments have been recently investigated as a potential way of estimating reliability of electronic systems [11]. However, they pose potential loading problems as they directly interact with the critical (internal) nodes of the system. Therefore, an indirect approach is favoured for such reliability estimations.

The objective of this paper is to present such a novel technique for estimating the reliability of electronic systems that minimally interacts with critical (internal) nodes. The main idea is to use the design-stage reliability estimations for calculating a set of values that can be later used at system level as a mean of an indirect way of estimating reliability of the overall system. Therefore the following question and its solution will be the focus of this paper.

- how can design-stage reliability estimations of a system be a basis for a set of values that can give information about the temporal degradation of its reliability during its operational life.

The rest of this paper is organized as follows. Section II will describe the important mathematical formulation for extracting degradation rate and estimating reliability. An exemplary system for extracting the degradation rate per unit time of a potential critical performance parameter sensitive to aging effects and the corresponding system-level simulations in a LabVIEW environment to indirectly estimate reliability have been discussed in sections III and IV respectively. The conclusions are presented in section V.

II. DEGRADATION RATE EXTRACTION AND RELIABILITY ESTIMATION APPROACH

NBTI being currently the most dominant reliability degradation mechanism in aging sensitive technology nodes is

the only one discussed in this research work. Typically NBTI degradation, which affects the threshold voltage of a transistor, is following a power law of stress time and is accelerated by the electric field in the MOS’s gate dielectric and by the temperature [12].

∆ exp exp ∗ 1

Where ∆ is the transistor threshold voltage shift due to the NBTI effect over the stress time ‘ ’ and is the NBTI degradation parameter. Parameters and are process-dependent constants and is the Boltzmann constant. Therefore, this expression gives the important information that the degradation in the threshold voltage of a transistor as a result of the NBTI effect is a function of and . The electric field ( ⁄ ) is proportional to the applied input-stress voltage . Hence one can state:

∆ , , 2 If one further extends this idea to an electronic system which is composed of these transistors one can say that the degradation in a potential critical performance parameter ‘ ’, sensitive to NBTI effects, of the system will also be a function of input-stress voltage and working-stress temperature over the stress time ‘ ’. Therefore, degradation in ‘ ’ as a result of NBTI effect can be written as:

∆ , , 3 This expression shows that at different input-stress voltages and working-stress temperatures the degradation or change in performance parameter ‘ ’ due to the NBTI effect will be different. This degradation further depends on the amount of time these stresses are applied giving different degradation rates at different values of applied stresses. This can be expressed as:

∆ , , 4

This degradation rate can be extracted from simulations at the design stage. One simple approach is to stress the electronic system continuously at each individual input-stress voltage and working-stress temperature over the fixed stress time, for example twenty years. By doing this one can have two values of arbitrary performance parameter ‘ ’. One value represents the fresh value ‘ ’ without the stress time and the other value ‘ ’ represents the degraded value stressed for each individual stress value VSTRESS and TSTRESS over the stress time ‘ ’ (e.g. 20

years). This can be expressed as:

, , ,

and , , ,

therefore ∆ , , , 5

where i and j spans over the possible input-stress voltage and working-stress temperature values with ‘ ’ the start time and ‘ ’ the final time (e.g. 20 years) for which the stress has been applied. The average degradation in performance

parameter ‘ ’ per unit time or average degradation rate due to the NBTI effect can be extracted as:

∆ , , , ₆

This approach will give a linear degradation behaviour over the stress time ‘ ’ (e.g. 20 years). One other approach is to stress the electronic system continuously at each individual input-stress voltage and working-stress temperature

over a pre-specified interval of time and measure the degradation over each time interval. For example design stage degradation can be measured at every hour or month or year over the total time of twenty years. This will enable to provide more precise degradation behaviour, like non-linear, rather than simply linear as previously discussed.

Each of these degradation rates corresponds to each individual input-stress voltage and working-stress temperature. Therefore, by having these values one can easily determine which degradation rate will be applicable to performance parameter ‘ ’ over a stress time ‘ ’ if the corresponding input-stress voltages and working-input-stress temperatures are known. The degraded value of the performance parameter ‘ ’ due to the NBTI effect for stress time ‘ ’ can be calculated as:

∆

∗ 7 Where is the initial value of performance parameter ‘ ’ at time ‘ ’ and ∆ ⁄ ∗ is the change in ‘ ’ due to the NBTI effect over a stress time ‘ ’. Similarly, if the input-stress conditions are varying over stress time ‘ ’ then the total stress time ‘ ’ can be divided into ‘n’ time points ( , , , …… , ) where during each time

interval ( , , … … , ) the input-stress

voltages and the working-stress temperatures are constant. In this case (7) can be rewritten as:

∆ ∗ ∆ ∗ … … … …. … … … …. ∆ ∗ 8 The result is the total change in performance parameter ‘P’ due to the NBTI effect for the stress time ‘ ’, being the cumulative sum of each individual change during each time interval with their individual stress conditions over its initial value.

This provides the basis of the proposed approach where the design-stage simulations along with the aging effects (NBTI etc.) for a particular performance parameter ‘ ’ at each individual input-stress voltage and working-stress temperature are used to acquire a set of degradation rate values. This set of values can then be used at the system

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ack system over a king-stress temper e interval ‘ e system wher potential cr effects, have ndirectly at sy er degradation RRESPONDING S known as b used in integ formation from ch buffer ampl ltage ( ) a ormance param different a t be monitored erational life Therefore, in feedback amp considered a put offset has meter as show simulations, b SMC PDK lib een conducte respectively. the unity feed stress voltages res (0 ows the chang to the NBTI e vidual input-s stress tempera his figure tha to the NBTI e the range of i mperatures 100 5 8.6 erature - [°C] 0 20 40 60 80 100 a range ratures ’ re the ritical been ystem n and G buffer grated m one lifiers at the meter aging d and if a order plifier as an been wn in based brary, ed in dback s 0.0 – ge or effect stress atures at the effect nput-.

Figure 3: Change in the output offset voltage due to the NBTI effect of the unity feedback system which is continuously stressed for twenty years over

a range of input-stress voltages 0.0 1.0 and working-stress temperatures 0.0 125.0

For small values of input-stress voltage , the output offset voltage is increasing; it means the degradation is in the positive direction as the temperature is increasing. Whereas, on the other hand, for higher values of input-stress voltage values the output offset voltage is decreasing, meaning the degradation is in the negative direction as the temperature is increasing.

This contradicts the usual concept of aging effects that the degradation due to aging mechanisms (NBTI etc.) will be unidirectional; they are either increasing or decreasing. Here it is clear that the output offset voltage could increase or decrease over the stress time depending on the input-stress conditions.

This also highlights the importance of monitoring reliability during the operational life of a system despite the usual concept of reliability estimations at the design stage simulations.

Fig. 3 gives a set of values that can be used at the system level for indirectly estimating the degradation in the output offset voltage by knowing the corresponding input-stress voltages and working-stress temperatures. For example, let ∆ represent the degradation of the output offset voltage due to the NBTI effect stressed over twenty years of time . Then using the mathematical formulation described in (5) it can be rewritten as:

∆

where , ,

and , , 11

Hence the degradation of output offset voltage due to the NBTI effect per unit time can be written as:

∆

12 Similarly, if the total stress time ‘ ’ is divided into ‘n’ time points ( , , , …… , ) then using (8):

∆ ∗ ∆ ∗ … … … …. … … … …. ∆ ∗ 13 Therefore, the total degradation in the output offset voltage during the time ‘ ’ will be the sum of initial offset voltage value at time ‘ ’ and the change in offset voltage value due to the NBTI effect over the stress time interval ‘ ’ assuming that the stress conditions during this time interval are constant. This assumption can be made valid if the stress time interval is assumed sufficiently short that the stress conditions remain constant over that interval. Hence the total degradation over the stress time ‘ ’ will be the cumulative sum over each individual stress time interval with their individual stress conditions.

Similarly, if and represent the designed functional specification boundaries for the output offset voltage then the reliability at any time point ‘ ’ will be given by:

∗ 14

in case ‘ ’ has increased during the time interval ‘ ’ and will be given by:

∗ 15

in case ‘ ’ has decreased during the time interval ‘ ’ respectively.

The next section will present the simulation results of the same unity feedback system where the design-stage degradation values (Fig. 3) have been stored in a database. The degradation in the output offset value due to the NBTI effect and the corresponding reliability of the system have been estimated indirectly by regularly monitoring the stress conditions ( and ) and using (13)-(15).

IV. SIMULATIONS AND RESULTS

In order to investigate the proposed idea of estimating the reliability during the operational life of a system, a simulation setup has been constructed in the LabVIEW environment. This simulation setup consists of an input-stress voltage (green line in Fig. 6) that can be randomly generated with an initial starting value varying between the provided maximum and minimum values. Similarly, the working-stress temperature (red line in Fig. 6) can be generated randomly with an initial starting value varying between the provided maximum and minimum values. These randomly generated values of input-stress voltage and working-stress temperature have been used to truly represent a real working environment.

The set of design-stage degradation values (Fig. 3) of the output offset voltage for twenty years of continuous stress over the possible range of input-stress voltages and working-stress temperatures have been used to calculate the degradation value per hour (as an illustration) using (12). These values of the output offset voltage due to the NBTI effect

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