Electronics: Demod + 4Q FE
Demodulator boards
• Design Q2, Q3 2006
• Prototype Q1 2007
• 2+2 Boards Q2 2007
• Amplifier (noise)
• PCB length
• 8.35 MHz (band filter)
Han Voet, VU Amsterdam
4Q FE: outside
• Dimensions of box roughly the same (50 * 100 * 150 mm).
• Mounting tube (30 mm) on front.
• Same connectors and supply and steering voltages.
• One more Lemo for bias monitoring.
• New LF outputs.
• Same detector (YAG 444-4), but rotated to + orientation.
• Simple overload indication (LEDs).
4Q FE: inside
• Total redesign (old → new):
• First stage 2 kV/A → 10 kV/A
• DC output amp. 5*, roll off at 100 Hz to 1*, passive pole at 35 Hz (if load > 50 kΩ) → cable driver 1*, pole at 100 kHz.
• Extra LF outputs, 1Hz to 100 kHz.
• HF outputs amp. 20*, second order high pass 30 kHz, assumed BW 25 MHz → amp. 4*, 800 kHz … 25 MHz.
• Bias monitor
Status
• Components needed for CAD design defined.
• Detector board, with first stage pre-amp, layout made.
• Driver board in progress. This board contains the cable drivers, differential amplifiers for the hor. and vert.
outputs, bias generation etc. Takes about two more weeks. Production, assembly and test, another ~8 weeks.
• “Exotic” components ordered.
• Housing under investigation.
Implementation Plan (updated March 2007)
2006 2007 2008
Tasks and Deliverables 1-3 4-6 7-9 10-
1
2 1-3 4-6 7-9 10- 1
2 1-3 4-6 7-9 10- 1 2 Tasks
Documentation of 4440 modules Design demodulator
Test prototype demodulator
Design FE
Test FE prototype
Test QD prototypes Deliverables
Questions
• Remarks on the proposed roll off frequencies?
• Can the proposed LF output replace the whitening filter?
(the amplifications and cut offs can be easily adjusted) More ADC channels are needed in this case. But hard to control variations between channels (especially phase errors) are avoided and compensations (loop stability) are much easier.
• Should the mounting position be moved from the front
‘pipe’ to the side of the box?
Noise
The input referenced noise of the first stage is:
The input current noise dominates at low frequencies. The input voltage noise, together with the capacitance of the
detector diode, shows up at higher frequencies. The current design has a single op-amp per channel with reasonable noise figures. This can be further improved when needed.
2 2
2 4 ( 2 )
3
N N D
A N
F F
E E F C
kT A
I I
R R Hz
Bias
The bias voltage will be fully on (-180 V) when -5 V is applied. It is off at 0 V or above. Between 0 and -5 V it
reacts proportional. There is a monitor output with a scale -1/40, -200 V bias gives +5V. This can be connected to the ADC instead of the existing direct feedback from the
steering DAC.
It is not 100% clear whether this exactly how the previous version reacts, but seems to be compatible.
