BiCMOS high-performance ICs : from DC to mm-wave
Citation for published version (APA):
Smolders, A. B., Gul, H., Heijden, van der, E., Gamand, P., & Geurts, M. (2009). BiCMOS high-performance ICs : from DC to mm-wave. In Proceedings of the IEEE Bipolar/BiCMOS Circuits and technology Meeting, BCTM 2009, 12-14 October 2009, Capri, Italy (pp. 115-122). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/BIPOL.2009.5314130
DOI:
10.1109/BIPOL.2009.5314130
Document status and date: Published: 01/01/2009
Document Version:
Publisher’s PDF, also known as Version of Record (includes final page, issue and volume numbers)
Please check the document version of this publication:
• A submitted manuscript is the version of the article upon submission and before peer-review. There can be important differences between the submitted version and the official published version of record. People interested in the research are advised to contact the author for the final version of the publication, or visit the DOI to the publisher's website.
• The final author version and the galley proof are versions of the publication after peer review.
• The final published version features the final layout of the paper including the volume, issue and page numbers.
Link to publication
General rights
Copyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights. • Users may download and print one copy of any publication from the public portal for the purpose of private study or research. • You may not further distribute the material or use it for any profit-making activity or commercial gain
• You may freely distribute the URL identifying the publication in the public portal.
If the publication is distributed under the terms of Article 25fa of the Dutch Copyright Act, indicated by the “Taverne” license above, please follow below link for the End User Agreement:
www.tue.nl/taverne Take down policy
If you believe that this document breaches copyright please contact us at: openaccess@tue.nl
providing details and we will investigate your claim.
BiCMOS High-Performance ICs: From DC to mm-Wave
A.B. Smolders, H. Gul, E. v.d. Heijden, P. Gamand, M. Geurts
NXP Semiconductors, Gerstweg 2, 6534 AE Nijmegen, The Netherlands
Bart.Smolders@nxp.com
ABSTRACT — Progress with silicon and silicon
germanium (SiGe) based BiCMOS technologies over the past few years has been very impressive. This enables the implementation of traditional microwave and emerging mm-wave applications in silicon. The paper gives an overview of several high-performance ICs that have been implemented in a state-of-the-art BiCMOS technology (QUBiC4). Examples of high-performance ICs are described ranging from basic building blocks for mobile applications to highly integrated receiver and transmitter ICs for applications up to the mm-wave range.
Index Terms — Silicon bipolar/BiCMOS process
technology, RF circuits, microwave circuits, mm-wave circuits.
I. INTRODUCTION
During the last years we have seen a breakthrough in SiGe BiCMOS IC technologies. State-of-the-art BiCMOS [1],[2] have transit frequencies well above 200 GHz. This is also illustrated in Fig. 1, where the ITRS roadmap on BiCMOS and CMOS technologies is shown in terms of the transit frequency fT of the IC
technologies over the years. Fig. 1 also shows typical applications that can be addressed with the technology, assuming that the fT needs to be in the
range between 2x and 10x the application frequency. Until recently this kind of performance could only be achieved with GaAs-based processes. Therefore, it is now possible to implement traditional microwave and mm-wave applications in silicon. The benefits of implementation in BiCMOS silicon are, next to the much lower cost, the possibility to integrate more functions, because these silicon processes have a very broad range of components available, ranging from digital blocks in CMOS to varactors, excellent passives and many different types of resistors. An example of such a technology is the NXP QUBiC4Xi technology [2]. This SiGe:C-based technology uses a faster NPN heterojunction bipolar (HBT) in order to obtain an f
T /fmax of 216/177 GHz and BVcb0 of 5.2 V.
It also offers an excellent substrate isolation that is achieved by using a high-resistivity substrate (200 cm) and optimized layout techniques.
BiCMOS technologies provide the best performance/cost mixture for discretes, building blocks and more integrated solutions for low, medium
and high volume applications that require a high-performance.
This paper will give an overview of the typical circuits that have been implemented in a state-of-the-art (SiGe) BiCMOS technology (QUBiC4) for various applications ranging from DC to mm-waves .
Fig. 1: International Technology Roadmap for Semiconductors [ITRS], www.itrs.net.
II. BUILDING BLOCKS: LNAS
As a typical example of high-performance building blocks in BiCMOS technology, we will give an example of a Low-Noise-Amplifier (LNA). The LNA is one of the most important circuit blocks in the receiver design, it has to amplify very weak signals coming from the antenna without adding too much noise. The input and the output impedances should be matched to the source and the load impedances, respectively. Considering the bandwidth, LNA applications can be divided into two categories:
1. Broad band LNAs for CATV, set-top box, 2. Narrow-band LNAs for GPS, satellite down
converters (LNB).
Broadband LNAs require resistive feedback to achieve impedance match while narrow-band LNAs make use of impedance transforming filters and resonators. The matching method has impact on the Noise Figure (NF). In several applications (e.g. basestations) a NF close to or smaller than 1 dB is needed in combination with a high-linearity. In such
1990 1995 2000 2005 2010 2015 2020 10 100 1000 Year RFCMOS SiGe BiCMOS Sat TV 24 GHz Car radar 60 GHz WLAN 77 GHz Car radar 94 GHz Imaging fT=2*fap fT=10*fap Qubic4Xi 20~30 GHz Point to i FT[GHz]
applications, traditionally GaAs PHEMT-based LNAs are used. A SiGe BiCMOS technology becomes an attractive alternative option since the same noise and linearity levels can be achieved at a much lower cost level. As an example, the external GPS LNA is discussed here in more detail.
The trend in wireless communication is to integrate all standards in one cellular phone. The next generation cellular phones will be equipped with GSM, WLAN, Bluetooth and GPS. The difficulty for the receiver design can be appreciated by noticing that the GSM transmit power can be as high as +36 dBm while the required sensitivity for the GPS receiver is around -130 dBm. The GPS receiver can be blocked by the strong GSM jamming signal. In most implementations, a SAW filter in front of the external LNA is applied in order to reduce the strong jamming signal. Assuming 15 dB isolation between the GSM and GPS module and a stop band attenuation of 40 dB for the SAW filter, a GSM signal of –19 dBm will still be present at the input of the GPS LNA. The GPS LNA must have a very high linearity to operate correctly in the presence of such a strong jamming signal, while still remaining low power consumption. By using an adaptive biasing concept it is possible to meet these requirements. The LNA draws a current of 4 mA in case of no jamming signals. The current is gradually increased to 12 mA in presence of strong jamming signals, which is realized with an adaptive biasing circuit. The bias circuit consists of a peak detector, a comparator and bias control block. The schematic of the LNA is shown in Fig. 2. The LNA achieves a 16 dB power gain (Fig. 3), a noise figure of 1dB at a supply voltage of 1.8V (Fig. 4) and +8 dBm input-referred out-of-band IP3 (Fig. 5), [3].
+ -VS RF_out RF_in 5k: Le Lb + -50: 50: Lc Peak Detector Comparator Vref Vpeak VCC EN Bias Control
Fig. 2: Schematic of the GPS LNA with adaptive biasing
BGU7005, 1.8V S21 -20 -15 -10 -5 0 5 10 15 20 000.0E +0
1.0E+9 2.0E+9 3.0E+9 4.0E+9 5.0E+9 6.0E+9 7.0E+9 8.0E+9 9.0E+9 10.0E+ 9 [Hz]
[d
B
]
Fig. 3: Measured gain curve: S21 as function of frequency.
Fig. 4: Measured minimum NF and NF with 50 : termination
O_IIP3 level Vsupply =1.8V
-100 -80 -60 -40 -20 0 20 40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 Pdrive(dBm) P(d B m ) IMD3 PL O-IIP3=+8.5dBm
Fig. 5: Measured out-of-the-band IP3 referred to the input.
III. HIGHLY INTEGRATED TRANSMITTERS AND RECEIVERS ICS
Recent challenges in several application domains deal with low power, wide frequency bandwidth, multi-bands and multi-modes of operation and/or a combination of these. This adds specification
requirement like wide tuning range VCOs, interferer immunity, low power consumption, high linearity. The technology plays an important role in achieving the performance of a RF SoC. For instance deep trench isolation, high-resistivity substrate in the range of 200 :cm and high quality back-end elements like high Q MIM, low-K dielectric and thick metal at 10 Pm away from the silicon substrate are essential. Combination of these features allows very compact design of RF complex transceivers. Fig. 6 shows a GSM/EDGE transceiver integrated in 4 mm2 in QUBiC4 technology and Fig. 7 its block diagram.
Fig. 6: Cellular Transceiver
Fig. 7: Transceiver block diagram
A near Zero IF architecture is used in the receiver path. The noise figure of the full receiver chain is 3.2 dB typical with a current consumption of 65 mA . The direct up-conversion transmitter achieves excellent noise performance (-163 dBc/Hz at 20 MHz offset). Multi-mode ADC have been integrated in a next generation Quad-Bands TRx within only 0.4 mm2 while demonstrated 84 dB dynamic range [4]. Some applications, in particular in automotive areas, combine both multi-modes, low power consumption and a wide supply voltage range. The latter put severe
design challenges in particular in the supply voltage management and ESD constraints. Fig. 8 shows an ISM multi-mode transceiver operating from 3.6V supply down to 2.1V. It has an integrated 12dBm power amplifier. Dual gate oxide is used to manage the 3.6V supply. The transceiver covers the range of 315MHz to 915MHz and integrates part of the digital base band processing (RSSI, filtering, demodulation). The chip presented in Fig. 9 has a die area of 4 mm2.
Fig. 8: Block diagram of the ISM transceiver
The receiver architecture is based on a low-IF concept. The transmit chain includes a fractional-n synthesizer and a class-E power amplifier. ASK, FSK, GFSK modulations are supported.
Fig. 9: ISM multi-bands low power transceiver
The receiver noise figure is less than 5 dB over the full supply voltage range. The total current consumption in the receive mode with the PLL, VCO and the digital processing is less than 17mA. Evolution towards SoC integration with the microcontroller will lead to a natural next step towards advanced CMOS technology.
Other applications make use of the technology features and performance to design highly integrated RF front-ends. In wide band TV receivers for DVB-H/T optimization of the linearity, low noise, impedance matching, wide tuning range is key [5]. Fig. 10 shows the block diagram of such a receiver.
Fig. 10: Block diagram of the DVB receiver
The circuit integrates the wide band LNA, tracking filtering capabilities and the IF chain. Synthesizers with integrated LC VCOs with wide tuning range are also fully integrated. Fig. 11 shows the circuit.
Fig. 11: Microphotograph of the circuit
The wide band DVBT/H receiver shows -81dBm sensitivity from 50MHz to 860MHz, with an overall receiver noise of less than 3.9dB, an IIP3 of -5dBm and a high IIP2 of +25dBm. Next generation pushes the integration to include more digital processing and prepare for more wide-band concepts and prepare for SDR. For that purpose, the CMOS065/45nm technology node will be used.
IV. SATELLITE MICROWAVE RECEIVERS
The main RF frequency bands currently deployed for Direct To Home (DTH) and Very Small Aperture Terminal (VSAT) reception are: Ku (10.7~12.75 GHz) and Ka (18.3~20.2 GHz). Since power on board of satellites is limited and the satellites are separated in a narrow spatial position, a receiver requires both a high antenna gain (e.g. 36 dBi [6]), typically realized via an offset dish reflector, as well
as a low noise figure using a high-performance LNA. The noise figure of the complete Low Noise Block (LNB) must be well below 1.5 dB [6]. The actual signal demodulation and channel selection is realized in the In-Door Unit (IDU) or Set Top Box (STB) for the DTH case. The used RF frequencies have a high attenuation on cost-effective cables. Therefore, all systems require a frequency conversion between the LNB and the STB. An IF frequency of 950~2150 MHz is typically used. Control for polarity switching, LO selection, DC supply are shared via the coax cable, and are controlled by the IDU.
For the transmit application (VSAT) an identical setup is used. Since multiple terminals transmit to a common satellite, a provision is required to enable precise frequency and time multiplexing. This is available in the downlink signal. The IDU converts this to a 10 MHz signal and multiplexes this with the uplink IF signal. The LO signal in the Block Up Converter (BUC) needs to be frequency locked to this reference [7].
In the following part of this section we will present several examples of sub-systems that have been integrated into BiCMOS technology both in the Ku as well as Ka-band.
A. Ku band
An extensive overview on blocks for the Universal Single LNB is given in the references [8], [9]. Traditionally, LNBs are build up using a discrete solution. This discrete realization is very simple and has a low component cost. The oscillator is based on a high-Q Dielectric Resonator Oscillator (DRO) with one bipolar transistor. The mixer is realized with a double diode or a transistor, IF gain stages are available in various gain settings [10]. The disadvantage of this solution is that despite the low component cost, the manufacturing is labor intensive: every LNB requires adjustment of the DRO frequency. Due to the availability of low-cost Silicon, packaging and Automated Test Equipment (ATE) capability, it is possible to offer a synthesized solution, removing the need for alignment in production. This has evolved into an integrated downconverter in BiCMOS [11]. It includes an integrated mixer, IF amplifier, synthesized LO generator and crystal oscillator. The LO frequency can be switched via a single pin, and requires a 50 MHz overtone crystal. The realised performance of the downconverter is summarized in table 1.
TABLE I
LNB DOWNCONVERTER IC SPECIFICATIONS
Parameter MIN TYP MAX UNIT
Vcc 3.0 3.3 3.6 V
Icc 102 125 mA
NF 10 dB
CG 26 32 35 dB
IP3o 10 dBm
Phase Noise 2.0 2.5 qRMS
The BUC used in the LO of a VSAT system is synchronized to a 10 MHz reference signal. For this system we have developed a key block in the LO generator. This IC expects a conversion from 10 MHz to 204 MHz by an external VCXO based synthesizer. It converts the 204 MHz to 13.05 GHz. The results over voltage and temperature are shown in table II, Fig. 14 and Fig. 15.
TABLE II
VSAT LO GERENATOR IC SPECIFICATIONS
Parameter MIN TYP MAX UNIT
Ambient Temperature -40 85 qC Vcc 3.0 3.3 3.6 V Icc 104 mA Pout -5 -4 dB 100kHz PN -92 dBc/Hz B. Ka band
Target for this work on LNB integration is the first commercial available service as used in the US by DirecTV [8]. We have developed the key blocks for an integrated downconverter at Ka band: VCO [12], LNA-mixer and divider. A photograph of the IC is shown in Fig.12. The measured gain and noise figure are given in Fig. 13 and Fig. 16, respectively. The excellent agreement between measurement and simulation is obtained by using an accurate model for the package based on rigorous EM-simulations.
The BUC system at Ka band is similar to the Ku band, but with target output frequency of 29.5~30 GHz. The LO frequency is equal to 28.55 GHz. Based on the Ku-band version we improved the in-band phase noise and increased the VCO frequency. The in-band phase noise is maximum –104 dBc/Hz @ N=64.
Fig. 12. Chip photograph of the Ka-band downconverter
Fig. 13. Ka band downconverter gain, simulation versus measurements.
Fig. 14. Spurious from the 204 MHz reference (13.05 GHz carrier). Performance is better than –71 dBc.
Fig. 15. Phase noise density (13.05 GHz carrier). Performance is better than –100 dBc/Hz for offset
frequencies > 5kHz -6 -4 -20 2 4 6 8 10 12 14 16 18 20 8 10 12 14 16 18 20 22 24 26 28 RF[GHz] sim meas Ga in (d B ) -6 -4 -20 2 4 6 8 10 12 14 16 18 20 8 10 12 14 16 18 20 22 24 26 28 RF[GHz] sim meas Ga in (d B ) -100 -90 -80 -70 -60 10 11 12 13 14 15 16 Frequency [GHz] R e fe re nc e s p ur [d B c ] -40 ºC 3.0 V -40 ºC 3.3 V -40 ºC 3.6 V 25 ºC 3.0 V 25 ºC 3.3 V 25 ºC 3.6 V 85 ºC 3.0 V 85 ºC 3.3 V 85 ºC 3.6 V -150 -140 -130 -120 -110 -100 -90
1E+3 10E+3 100E+3 1E+6 10E+6 100E+6 1E+9 Offset frequency from carrier [Hz]
Phas e n o is e de ns ity [dBc /Hz ] -40 ºC 3.0 V -40 ºC 3.3 V -40 ºC 3.6 V 25 ºC 3.0 V 25 ºC 3.3 V 25 ºC 3.6 V 85 ºC 3.0 V 85 ºC 3.3 V 85 ºC 3.6 V
Fig 16. Ka band downconverter NF, simulation versus measurement.
V. EMERGING MICROWAVE/MM-WAVE APPLICATIONS
Short-range radar is a technology that potentially can help to enhance road safety. In the USA as well as in Europe, frequency bands around 24 GHz and 77 GHz have been opened up for automotive radar applications. An Ultra-Wideband (UWB) transmit path in a production 0.25 Pm SiGe BiCMOS IC technology has been demonstrated in [13]. The schematic and a chip photograph are shown in Fig. 17.
Fig. 17. Schematic and the chip photograph of the UWB transmitter.
The UWB signal is generated by means of bi-phase modulation of a 24 GHz carrier with a pseudo-noise data signal. When no digital modulation signal is applied, the IC can be used for FM-CW modulation. The transmit path supports pseudo-noise bi-phase modulation up to 2 Gb/s data rates and generates an un-modulated output power between 2 and 5 dBm differentially for frequencies between 15-27 GHz. The 0.80x0.66 mm2 IC dissipates 168 mW from a 3.3V supply.
A receiver IC for 24 GHz short-range radar based on pseudo-noise code modulation has also been demonstrated [14]. The block diagram of the receiver is shown in Fig. 18. An on-chip 48 GHz LC-VCO plus frequency divider generate the I/Q clock signals for zero-IF down-conversion. The VCO architecture, based on double-emitter followers with resistive load, combines the negative resistance function with 50 : output driving capability. The VCO topology is similar to an earlier demonstrated 35.2-37.6 GHz LC-VCO [15], which chip photograph is depicted in Fig. 19.
Fig. 18. Block diagram of the 24 GHz receiver for short-range radar [14].
Fig. 19. Chip photograph 35.2-37.6 GHz LC-VCO.
The 24 GHz output signal of the first frequency divider is available off-chip as carrier for the transmitter IC. The IC includes two LNAs with
built-Biphase Modulator single-ended to differential carrier in 21-27 GHz CMOS to CML PN data in VCC Lm Cm Cm oa ob Ib 2-bit Pout programming 10 0 : D if fe re n tia l lo a d PA 50 : 10 k: LNA Select In 1 CMOSto CML 48 GHz VCO /2 /2 I Q 24 GHz VCO monitor 12 GHz (to PLL) Delayed PRBS Vtune Clock generation Down conversion Biphase demod 3 GHz 3 GHz VCC = 4 V SiGe BiCMOS receiver IC IF Out I IF Out Q 48G in sel SiGe Tx IC PRBS LNA Biphase mod In 2 24 GHz UWB transmit signal 120
in single-ended to differential conversion [16]. The 1.50x1.70 mm2 receiver IC achieves a measured DSB noise figure below 7 dB across a 2.5 GHz DSB IF bandwidth, with a conversion gain of 39 dB. A chip photograph is depicted in Fig. 20.
Fig. 20: Chip photograph UWB receiver.
Two order band-pass filters, based on a third-order Chebyshev low-pass filter with a pass-band ripple of 0.2 dB, have been demonstrated for 24 and 77 GHz [17]. The filters consist of three coupled LC-resonators, implemented by three shorted stubs and three MIM-capacitors. 77 GHz is especially interesting for long-range radar applications. The losses are below 7 dB (i.e. pass-band ripple below 2 dB) in the pass-bands from 23.4-31.0 GHz and 67.3-90.1 GHz.
On-chip inductors of 71 pH and 24 pH are made by shorted stubs, with a characteristic impedance Z0 of
54 :. The line lengths are 200 and 67 Pm (see Fig. 21), which correspond to an inductance of the shorted stub of 355 pH/mm.
Fig. 21. Chip photograph 24 and 77 GHz band-pass filters.
When moving to mm-wave frequencies, integrating the antenna-on-chip becomes feasible from a cost point-of-view. In this way lossy off-chip interconnect and matching circuits are not needed. In addition, we can still use standard wirebonding techniques, since we do not have RF-interconnects anymore.
We have investigated several antenna structures integrated into a BiCMOS technology build on a high-resistivity substrate (200 cm). As an example we show here a design of an on-chip antenna that is intended to be directly matched to a differential low noise amplifier that is placed on the same chip. The antenna impedance is chosen in such a way that we can use an inductor-less LNA. For noise-matching purposes we have chosen Zant = (30 + j30) : as antenna impedance at 60 GHz. In the chip design a special metal plate is implemented in the lowest metal layer to suppress the existence of lossy substrate modes. This technique as introduced in [18] works very well at 60 GHz as long as the substrate thickness is less than 360 Pm. The LNA and other active devices are intended to be placed on top of it. A photograph of the realised IC is shown in Fig. 22. Where active devices need to be connected to the silicon substrate, outs can be made. These cut-outs are not expected to degrade the substrate TE-mode suppression.
Fig. 22. Chip Design (photograph). Total chip size is 2x2 mm2.
The interconnection of the dipole and the LNA is carried out by a shielded transmission line, similar to those investigated in [19], of characteristic impedance Z0 = 60 :. Its length of 630 Pm corresponds to a quarter of a wavelength in the metal stack dielectric at 60 GHz. By this means it is possible to choose the dipole shorter than half a wavelength as its capacitive input impedance is transformed into an inductive one. The measured and simulated reflection coefficient of the antenna is depicted in Fig. 23. The measured antenna gain is around 0 dBi at 60 GHz, which is comparable with an off-chip antenna.
48 GHz LC-VCO 24 GHz LNA dividers Biphase demod I/Q downconversion
Fig. 23. Measured and simulated input impedance of the antenna-on-chip, frequency band [45-67] GHz, [18].
VI. CONCLUSION AND OUTLOOK
State-of-the-art BiCMOS technologies offer cost-effective high-performance building blocks and more integrated IC solutions for a variety of wireless applications up to the mm-wave frequency range.
In the upcoming years we expect to see a replacement of expensive GaAs-based components for high-performance applications by cost-effective IC-solutions in BiCMOS. With IC solutions in BiCMOS technology we benefit from the embedded digital intelligence for employing auto-calibration, built-in-self test, adaptive matching, automatic back-off and many other features that cannot be back-offered by GaAs or other discrete solutions. This trend will be facilitated by further performance and cost improvement of the BiCMOS technology in the next decade.
ACKNOWLEDGEMENT
The authors wish to acknowledge Olivier Aymard and Sébastien Amiot for providing information on the ISM transceiver and on the DVB TV Receiver.
REFERENCES
[1] Deixler, P. et al., “QUBiC4X: An fT/fmax =
130/140GHz SiGe:CBiCMOS manufacturing technology with elite passives for emerging microwave applications,” Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings BCTM 2004 Meeting, pp. 233–236, Sept. 2004.
[2] van Noort, W.D. et al., “BiCMOS technology
improvements for microwave application,” Bipolar/BiCMOS Circuits and Technology Meeting, 2008. Proceedings BCTM 2008. IEEE, pp. 93–96, Oct. 2008.
[3] www.nxp.com, [Online], BGU7005.
[4] le Guillou, Y et al., ”Highly-Integrated Direct Conversion Receiver for GSM/GPRS/EDGE with on-chip 84dB Dynamic Range Continuous-Time ADC”, IEEE Journal of Solid State Circuits, M7566, February 2005.
[5] Amiot, S. et al., “A low power DVB-T/H Zero IF Tuner IC Designed in a 0.25um BiCMOS technology for mobile TV reception”, IEEE Transactions on Broadcasting, vol 53, N°1, March 2007.
[6] www.ses-astra.com, [Online].
[7] Satellite Internet and VSAT Information Centrum. [Online]. http://www.satellite-internet-vsat.com/ [8] Vaucher, C.S., Apeldoorn, O., Apostolidou, M.,
Dekkers, J., Farrugia, A., Gul, H., Kramer, N., Praamsma, L., “Silicon-germanium ICs for satellite microwave front-ends”, Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 9-11 Oct. 2005, pp. 196 – 203.
[9] Vaucher, C.S., Apostolidou, M., Dekkers, J., Farrugia, A., Praamsma, L., “Low-cost silicon-germanium ICs for digital satellite outdoor units”, Digest of Technical Papers. International Conference on Consumer Electronics, ICCE. 2005, 8-12 Jan. 2005, pp. 297 – 298.
[10] NXP Semiconductors RF Manual 11th edition, section 3.4.1 “General-purpose wideband amplifiers ”, December 2008.
[11] NXP Semiconductors, [Online]. TFF1004HN,
TFF1003HN.
[12] van der Heijden, E., Farrugia, A., Breunisse, R., Vaucher, C.S., Pijper, R., “Colpitts VCOs for low-phase noise and low-power applications with transformer-coupled tank”, Radio Frequency Integrated Circuits Symposium, RFIC 2008, June 17 2008, pp. 653 – 656.
[13] Veenstra, H., E. van der Heijden, D. v. Goor, “15-27 GHz Pseudo-Noise UWB transmitter for short-range automotive radar in a production SiGe technology”, in Proc. ESSCIRC, 2005, pp. 275-278.
[14] Veenstra, H., E. van der Heijden, M. Notten, G. Dolmans, “A SiGe-BiCMOS UWB Receiver for 24 GHz Short-Range Automotive Radar Applications”, in Proc. IMS, 2007, pp. 1791-1794.
[15] Veenstra, H., E. v.d. Heijden, “A 35.2-37.6 GHz LC-VCO in a 70/100 GHz fT/fmax SiGe technology,” in
Proc. ISSCC, 2004, pp. 359-362.
[16] van der Heijden, E., H. Veenstra, D. Hartskeerl, M. Notten, D. v. Goor, “Low Noise Amplifier with integrated balun for 24GHz car radar”, in Proc.SiRF, 2008, pp. 78-81.
[17] van der Heijden, E. , M. Notten, G. Dolmans, H. Veenstra, R. Pijper, “On-chip third-order band-pass filters for 24 and 77 GHz car radar”, in Proc.IMS, 2006, pp. 697-700.
[18] Johanssen, U., A.B. Smolders, R. Mahmoudi, J.A.G. Akkermans, “ Substrate Loss Reduction in Antenna-on-Chip Design”, IEEE Proceeding of the Antennas&Propagation Symposium, 2009, to be published in June 2009.
[19] van Noort, W.D. and others, “On-chip mm-Wave passives,” Bipolar/ BiCMOS Circuits and Technology Meeting, 2007. BCTM ’07. IEEE, pp. 168–171, 30 2007-Oct. 2 2007.
