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University of Groningen

Large-Scale Neuromorphic Spiking Array Processors

Thakur, Chetan Singh; Molin, Jamal Lottier; Cauwenberghs, Gert; Indiveri, Giacomo; Kumar,

Kundan; Qiao, Ning; Schemmel, Johannes; Wang, Runchun; Chicca, Elisabetta; Hasler,

Jennifer Olson

Published in:

Frontiers in Neuroscience

DOI:

10.3389/fnins.2018.00991

IMPORTANT NOTE: You are advised to consult the publisher's version (publisher's PDF) if you wish to cite from

it. Please check the document version below.

Document Version

Publisher's PDF, also known as Version of record

Publication date:

2019

Link to publication in University of Groningen/UMCG research database

Citation for published version (APA):

Thakur, C. S., Molin, J. L., Cauwenberghs, G., Indiveri, G., Kumar, K., Qiao, N., Schemmel, J., Wang, R.,

Chicca, E., Hasler, J. O., Seo, J., Yu, S., Cao, Y., van Schaik, A., & Etienne-Cummings, R. (2019).

Large-Scale Neuromorphic Spiking Array Processors: A Quest to Mimic the Brain (vol 12, 891, 2018). Frontiers in

Neuroscience, 12, [991]. https://doi.org/10.3389/fnins.2018.00991

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CORRECTION published: 07 January 2019 doi: 10.3389/fnins.2018.00991

Frontiers in Neuroscience | www.frontiersin.org 1 January 2019 | Volume 12 | Article 991

Approved by:

Frontiers in Neuroscience Editorial Office, Frontiers Media SA, Switzerland

*Correspondence:

Chetan Singh Thakur csthakur@iisc.ac.in

Specialty section:

This article was submitted to Neuromorphic Engineering, a section of the journal Frontiers in Neuroscience Received: 07 December 2018 Accepted: 10 December 2018 Published: 07 January 2019 Citation: Thakur CS, Molin JL, Cauwenberghs G, Indiveri G, Kumar K, Qiao N, Schemmel J, Wang R, Chicca E, Hasler JO, Seo J, Yu S, Cao Y, van Schaik A and Etienne-Cummings R (2019) Corrigendum: Large-Scale Neuromorphic Spiking Array Processors: A Quest to Mimic the Brain. Front. Neurosci. 12:991. doi: 10.3389/fnins.2018.00991

Corrigendum: Large-Scale

Neuromorphic Spiking Array

Processors: A Quest to Mimic the

Brain

Chetan Singh Thakur

1

*, Jamal Lottier Molin

2

, Gert Cauwenberghs

3

, Giacomo Indiveri

4

,

Kundan Kumar

1

, Ning Qiao

4

, Johannes Schemmel

5

, Runchun Wang

6

, Elisabetta Chicca

7

,

Jennifer Olson Hasler

8

, Jae-sun Seo

9

, Shimeng Yu

9

, Yu Cao

9

, André van Schaik

6

and

Ralph Etienne-Cummings

2

1Department of Electronic Systems Engineering, Indian Institute of Science, Bangalore, India,2Department of Electrical and

Computer Engineering, Johns Hopkins University, Baltimore, MD, United States,3Department of Bioengineering and Institute

for Neural Computation, University of California, San Diego, La Jolla, CA, United States,4Institute of Neuroinformatics,

University of Zurich and ETH Zurich, Zurich, Switzerland,5Kirchhoff Institute for Physics, University of Heidelberg, Heidelberg,

Germany,6The MARCS Institute, Western Sydney University, Kingswood, NSW, Australia,7Cognitive Interaction Technology

– Center of Excellence, Bielefeld University, Bielefeld, Germany,8School of Electrical and Computer Engineering, Georgia

Institute of Technology, Atlanta, GA, United States,9School of Electrical, Computer and Engineering, Arizona State University,

Tempe, AZ, United States

Keywords: neuromorphic engineering, large-scale systems, brain-inspired computing, analog sub-threshold, spiking neural emulator

A Corrigendum on

Large-Scale Neuromorphic Spiking Array Processors: A Quest to Mimic the Brain

by Thakur, C. S., Molin, J. L., Cauwenberghs, G., Indiveri, G., Kumar, K., Qiao, N., et al. (2018).

Front. Neurosci. 12:891. doi: 10.3389/fnins.2018.00891

In the original article, there were mistakes in Table 5, Comparison of event-based neural processors,

as published. The area per neuron for the transistor channel was incorrectly provided as “4 cm

2

and should be “–” (empty). The synaptic plasticity for true North was incorrectly provided as

“STDP” and should be “No Plasticity.” The area per neuron for Loihi was incorrectly provided

as “0.4 mm

2

” and should be “0.4 mm

2∗

.” The corrected Table 5, Comparison of event-based neural

processors, appears below.

The authors apologize for these errors and state that the do not change the scientific conclusions

of the article in any way. The original article has been updated.

Copyright © 2019 Thakur, Molin, Cauwenberghs, Indiveri, Kumar, Qiao, Schemmel,Wang, Chicca, Hasler, Seo, Yu, Cao, van Schaik and Etienne-Cummings. This is an open-access article distributed under the terms of the Creative Commons Attribution License (CC BY). The use, distribution or reproduction in other forums is permitted, provided the original author(s) and the copyright owner(s) are credited and that the original publication in this journal is cited, in accordance with accepted academic practice. No use, distribution or reproduction is permitted which does not comply with these terms.

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Thakur et al. Neuromorphic Spiking Array Processors

TABLE 5 | Comparison of event-based neural processors.

Chip name Technology Process

(nm)

Neurons type #Neurons #Synapse Area per

neuron

#Energy per event

Synaptic plasticity

MNIFAT Mixed Signal 500 LIF/M-N 6,120 – 1,495 µm2 360 pJ Programmable

DeepSouth Digital 28 LIF 200K – – No Plasticity

Dynap-SEL Mixed Signal 28 I&F 1,088 78,080 20 µm2 2.8pJ STDP

BrainScaleS Mixed Signal 180 AdEx IF 512 100K 1,500 µm2 100pJ Hebbian learning,

STDP

2DIFWTA Analog 350 I&F 2,048 28,672 – No Plasticity

HiAER-IFAT board with 4 chips

Analog 90 I&F 256K 256M 140 µm2 22 pJ No Plasticity

Transistor-Channel

Analog 350 Floating Gate

MOSFET

100 30,000 – 10 pJ STDP

Neurogrid Mixed signal 180 Adaptive Quad IF 65K 100M 1,800 µm2 31.2pJ No Plasticity

TrueNorth Digital 28 Adaptive Exp IF 1M 256M 3,325 µm2 45pJ No Plasticity

SpiNNaker Digital 130 Programmable 16K 16M – 43nJ STDP

Loihi Digital 14 Adaptive LIF 130K 130M 0.4 mm2* 23.6 pJ Epoch-based, STDP

*Neurosynaptic core area with each core implements 1,024 neural units.

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