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MAI MULTE A TINTA UNI ON TO A ONI O NI NINI

US010033420B2

( 12 ) United States Patent

Lien et al

.

( 45 ) Date of Patent :

( 10 ) Patent No

. : US 10 , 033 , 420 B2

Jul . 24 , 2018

( 54 ) WIRELESS COMMUNICATION RECEIVER

( 56 )

References Cited

( 71 ) Applicant

: MEDIATEK Inc . , Hsin - Chu ( TW )

U . S . PATENT DOCUMENTS

7 , 385 , 443 B1 * 6 / 2008 Denison . . .

HO3F 3 / 38

330 / 10

( 72 ) Inventors : Yuan - Ching Lien , Taipei ( TW ) ; Eric

Klumperink , Enschede ( NL ) ; Bram

Nauta , Enschede ( NL )

9 , 071 , 219 B2 9 , 263 , 995 B2 6 / 2015 De Geronimo et al . 2 / 2016 Wang et al .

( Continued )

( 73 ) Assignee : MEDIATEK INC . , Hsin - Chu ( TW )

FOREIGN PATENT DOCUMENTS

( * ) Notice :

Subject to any disclaimer , the term of this

patent is extended or adjusted under 35

U . S . C . 154 ( b ) by 0 days .

WO 2011044585 A1 4 / 2011

OTHER PUBLICATIONS

( 21 ) Appl . No . : 15 / 469 , 690

( 22 ) Filed :

Mar

. 27 , 2017

( 65 )

Prior Publication Data

US 2017 / 0373710 A1 Dec . 28 , 2017

Related U . S . Application Data

( 60 ) Provisional application No . 62 / 353 , 587 , filed on Jun .

23 , 2016 .

( 51 ) Int . CI .

H04B 1 / 26

( 2006 . 01 ) H04B 1 / 28 ( 2006 . 01 ) H04B 1 / 10 ( 2006 . 01 ) H04B 1 / 16 ( 2006 . 01 ) HO3H 11 / 12

( 2006 . 01 )

( 52 ) U . S . CI . CPC . . . H04B 1 / 16 ( 2013 . 01 ) ; H03H 11 / 1204

( 2013 . 01 ) ; H04B 1 / 1018 ( 2013 . 01 )

( 58 ) Field of Classification Search

CPC . . . HO3H 11 / 0433 ; HO3H 11 / 0455 ; HO3H

11 / 0466 ; HO3H 11 / 0477 ; H04B 1 / 16

. . . 455 / 307 , 333

See application file for complete search history .

Andrews , et al . : " A Passive - Mixer - First Receiver with Baseband

Controlled RF Impedance Matching , < 6dB NF , and > 27dBm Wideband IIP3 ” ; ISSCC 2010 / Session 2 / mm - Wave Beamforming

& RF Building Blocks / 2 . 5 ; pp . 46 - 48 .

( Continued )

Primary Examiner — Simon Nguyen

( 74 ) Attorney , Agent , or Firm - McClure , Qualey &

Rodack , LLP

( 57 )

ABSTRACT

Provided is a wireless communication receiver including an

antenna for receiving an RF signal ; a first mixer , coupled to

the antenna , for performing frequency conversion on the RF

signal from the antenna by mixing the RF signal with a local

oscillator signal to provide a first intermediate frequency

( IF ) signal ; and a first filter , coupled to the first mixer

,

configured to pass a predetermined band of frequencies of

the first IF signal and to generate a first channel signal . The

first filter includes a negative feedback loop coupled to the

first mixer for performing negative feedback loop control on

the first IF signal ; and a positive capacitive feedback loop

coupled to the first mixer for performing positive capacitive

feedback loop control on the first IF signal , the negative

feedback loop and the positive capacitive feedback loop

being coupled in parallel .

5 Claims

, 5 Drawing Sheets

USPC . . .

. . .

positive

feedback Blocker

AKAT

in - band

Hof

flo

RF1

negative

feedback

in - band Blocker D

golding

0

(2)

US 10 , 033 , 420 B2

Page 2

( 56 )

References Cited

U . S . PATENT DOCUMENTS . . .

2007 / 0237273 A1 * 10 / 2007 Tan . . . HO3H 11 / 1291

375 / 350

2012 / 0196555 A1 * 8 / 2012 Igarashi . . . H04B 1 / 30

455 / 341

2013 / 0095779 A1 * 4 / 2013 Katsube . . . HO3H 11 / 1252

455 / 232 . 1 2015 / 0137882 A1 * 5 / 2015 Ciubotaru . . . HO3H 11 / 0405 327 / 558 2015 / 0180523 A1 * 6 / 2015 Tasic . . . H04B 1 / 26 375 / 316

2017 / 0040972 A1 * 2 / 2017 Taya

. . HO3H 11 / 1252

OTHER PUBLICATIONS

Chen , et al . : “ Reconfigurable Receiver With Radio Frequency Cur

rent - Mode Complex Signal Processing Supporting Carrier Aggre

gation " ; IEEE Journal of Solid - State Circuits , vol . 50 , No . 12 , Dec .

2015 , pp . 3032 - 3046 .

Andrews , et al . : " Implications of Passive Mixer Transparency for Impedance Matching and Noise Figure in Passive Mixer - First

Receivers ” ; IEEE Transactions on Circuits and Systems — I : Regu

lar Papers , vol . 57 , No . 12 , Dec . 2010 ; pp . 3092 - 3103 .

Soer , et al . : : A 0 . 2 - to - 2 . 0GHz 65nm CMOS Receiver Without LNA Achieving > 11dBm IIP3 and < 6 . 5 dB NF ; ISSCC 2009 / Session

12 / RF Building Blocks / 12 . 4 ; pp . 221 - 224 .

Darvishi , et al . : " A 0 . 3 - to - 1 . 2GHz Tunable 4th - Order Switched gm - C Bandpass Filter with > 55dB Ultimate Rejection and Out - of

Band IIP3 of + 29dBm ” ; ISSCC 2012 / Session 21 / Analog

Techniques / 21 . 1 ; pp . 358 - 360 .

TIPO Office Action dated Jan . 12 , 2018 in Taiwan application ( No .

106115939 ) .

(3)

U . S . Patent

Jul

. 24 , 2018

Sheet 1 of 5

US 10 , 033 , 420 B2

100

-

109

fogo

0090

- - - - 105A

2L0 + oy Logo

2L0 - 0 -

00180

U00270

- - - 107A

mixer

9M1

filter C11

0180

0180

9M3

s

that

her

to

MM

her

84

TC101

41

palun

8

0270

QM7

Il

momento

omeone

tot

.

OPZO

IRFANO

Ic14m

090

SM8

VV

mixer

105B

FIG . 1

(4)

U . S . Patent

Jul . 24 , 2018

Sheet 2 of 5

US 10 . 033 , 420 B2

POSE

feedback

Blocker

?

in

- band

* f

RE

negative

feedback

in

- hard

4G

AC1

Blocker

f

105

" topi

OP

FE

. 2

(5)

U . S . Patent

Jul . 24 , 2018

Sheet 3 of 5

US 10 , 033 , 420 B2

100

= = = ... ... ... * * .

-

- 09

- Rec

20

+

030

0390

-

80

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- 40?ce .

- - 05

mixer

- - 974

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# % # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # =

80

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= = = = = =

A

= - ?? 2 2

| Q3

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%

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mixer

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(6)

U . S . Patent

Jul

. 24 , 2018

Sheet 4 of 5

US 10 , 033 , 420 B2

400

- 405

mixer

- 407

OM1

filter C11

0180

OM2

0180

OM3

1h000

op

Bagh

00

balun

A1

FIG . 4

(7)

U . S . Patent

Jul

. 24 , 2018

Sheet 5 of 5

US 10 , 033 , 420 B2

500

505A2

mixer

00

9M9

0180

M10

0180

9M11

- 507A

filter C1

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- - - - -

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- 50582

FIG . 5

(8)

US 10 , 033 , 420 B2

WIRELESS COMMUNICATION RECEIVER

FIG . 4 shows a circuit diagram for a single - channel

wireless communication receiver according to an embodi

This application claims the benefit of U . S . Provisional

ment of the application .

Patent application Ser . No . 62 / 353 , 587 , filed Jun . 23 , 2016 ,

FIG . 5 shows a circuit diagram for a two - channel - four

the disclosure of which is incorporated by reference herein 5 mixer wireless communication receiver according to an

in its entirety .

embodiment of the application .

In the following detailed description , for purposes of

TECHNICAL FIELD

explanation , numerous specific details are set forth in order

to provide a thorough understanding of the disclosed

The disclosure relates in general to a wireless communi - 10 embodiments . It will be apparent , however , that one or more

cation receiver .

embodiments may be practiced without these specific

details . In other instances , well - known structures and

BACKGROUND

devices are schematically shown in order to simplify the

drawing .

Many modern radio frequency ( RF ) receivers use a direct 15

DETAILED DESCRIPTION

conversion or zero - IF ( ZIF ) architecture . RF signals

received at an antenna are fed through mixer driven by a

Disclosed are wireless communication receiver struc

local oscillator ( LO ) and subsequently filtered to produce a

tures . Note , embodiments described herein include various

baseband channel demodulated output signal . Ideally , RF 20 elements and limitations , with no one element or limitation

power amplifiers of the RF receiver would act linearly ,

contemplated as being a critical element or limitation . Each

faithfully reproducing an amplified RF signal at their output

of the claims individually recites an aspect of the invention

with no distortion . in its entirety . One or multiple systems , devices , compo

As for the design targets for the RF receiver , low noise nents , etc . may comprise one or more embodiments , which

figure ( NF ) , high third - order intercept point ( IIP3 ) and high 25 may include some elements or limitations of a claim being

central frequency ( fc ) are required . performed by the same or different systems , devices , com

The mixer - first receiver has advantages , for example ,

ponents , etc . The embodiments described hereinafter

good linearity , high tunable Q and low NF . The requirement embody various aspects and configurations within the scope

on improving the IIP3 of the receiver is one of the issues .

and spirit of the invention , with the figures illustrating

Further , to reject out - band signals , higher order BPF 30 exemplary and non - limiting configurations .

( band pass filter ) may be used . But

, numerous off - chip BPF

Technical terms of the disclosure are based on general

would increase the device cost .

definition in the technical field of the disclosure . If the

Thus , there needs a wireless communication receiver

disclosure describes or explains one or some terms , defini

architecture which achieves high linearity and requires

tion of the terms is based on the description or explanation

simple external low cost LPF ( low pass filter ) or BPF .

35 of the disclosure . Each of the disclosed embodiments has

one or more technical features . In possible implementation ,

SUMMARY

one skilled person in the art would selectively implement

part or all technical features of any embodiment of the

According to one embodiment , provided is a wireless

disclosure or selectively combine part or all technical fea

communication receiver including an antenna for receiving 40 tures of the embodiments of the disclosure .

FIG . 1 shows a circuit diagram for a wireless communi

a wireless communication signal ; a first mixer , coupled to

cation receiver according to an embodiment of the applica

the antenna , for performing frequency conversion on the

tion . The wireless communication receiver 100 includes an

received wireless communication signal from the antenna by

antenna 101 , a plurality of mixers ( two mixers 105A and

mixing the wireless communication signal with a local 45 105B in this embodiment but the application is not limited

oscillator signal to provide a first intermediate frequency by ) and a plurality of filters ( two filters 107A and 107B in

( IF ) signal ; and a first filter , coupled to the first mixer , this embodiment , but the application is not limited by ) . The

configured to pass a predetermined band of frequencies of wireless communication receiver may further optionally

the first IF signal of the first mixer and to generate a first include a balun ( balanced to unbalanced ) circuit 103 and two

channel signal . The first filter includes : a negative feedback 50 input capacitors Cin1 and Cin2 . In other possible embodi

loop coupled to the first mixer for performing negative

ments of the application , the input capacitors Cinl and Cin2

feedback loop control on the first IF signal from the first may be omitted .

mixer ; and a positive capacitive feedback loop coupled to

The antenna 101 is for receiving an RF signal . In FIG . 1 ,

the first mixer for performing positive capacitive feedback the equivalent circuit model of the antenna 101 is also loop control on the first IF signal from the first mixer , the 55 shown , which includes a serially - connected resistor element

negative feedback loop and the positive capacitive feedback

Rs and a voltage source Vs .

loop being coupled in parallel .

The balun circuit 103 is coupled to the antenna 101 . The

balun circuit 103 is an electrical device that converts

BRIEF DESCRIPTION OF THE DRAWINGS

between a balanced signal and an unbalanced signal . The

60 details of the balun circuit 103 are not specified here for

FIG . 1 shows a circuit diagram for a wireless communi -

simplicity .

cation receiver according to an embodiment of the applica The mixers 105A and 105B are coupled to the balun

tion . circuit 103 . The mixers 105A and 105B perform frequency

FIG . 2 shows an equivalent circuit model of the receiver

conversion on the received RF signals from the antenna 101

of FIG . 1 according to the embodiment of the application . 65 and output the resulting frequency - converted signal to the

FIG . 3 shows the transfer functions of the receiver of the subsequent filters 107A and 107B , respectively . Further , the

embodiment of the application .

mixers 105A and 105B mix the received RF signal with a

(9)

US 10 , 033 , 420 B2

C

local oscillator signal to provide an intermediate frequency

tors C5 - C8 , C13 - C16 and Ca2 . The filter 107A will be

( IF ) signal to the subsequent filters 107A and 107B , respec - explained . The details of the filter 107B may be referenced

tively . In the embodiment of the application , the mixers

to that of the filter 107A and thus are omitted here .

105A and 105B may have the same or similar circuit

In the filter 107A , the capacitor C1 and the resistor

structures and operations . 5 element RF1 are coupled in parallel between the non

The filters 107A and 107B are coupled to the mixers 105A

inverting input terminal and the inverting output terminal of

and 105B . The filters 107A and 107B operate to suppress an the operational amplifier OP1 . The capacitor C2 and the interfering wave from a neighbored channel . The filters resistor element RF2 are coupled in parallel between the

107A and 107B are configured to pass a predetermined band

inverting input terminal and the non - inverting output termi

of frequencies from the output signals of the mixers 105A 10 nal of the operational amplifier OP1 . The capacitor C3 is

and 105B and generate the output I / Q channel signals . coupled between the non - inverting input terminal of the

In the embodiment of the application , the filters 107A and operational amplifier OP1 and one terminal of the capacitor

107B may have the same or similar circuit structures and

Cal . The capacitor C4 is coupled between the inverting

operations .

input terminal of the operational amplifier OP1 and another

The mixers 105A and 105B will now be explained . The 15 terminal of the capacitor Cal . The capacitor C9 is coupled

mixer 105A includes NMOS transistors M1 - M4 , as shown from the non - inverting input terminal of the operational in FIG . 1 . The NMOS transistor M1 includes a source ( or amplifier OP1 to GND . The capacitor C10 is coupled from

drain ) coupled to the non - inverted input of the operational

the inverting input terminal of the operational amplifier OP1

amplifier OP1 of the filter 107A , a drain ( or source ) coupled to GND . The capacitor C11 is coupled from the output

to the input capacitor Cinl and a gate receiving the clock 20 terminal of the operational amplifier OP1 to GND . The

signal 00 . The NMOS transistor M2 includes a source ( or capacitor C12 is coupled from the output terminal of the

drain ) coupled to the source ( or drain ) of the NMOS operational amplifier OP1 to GND . The capacitors C9 - C12

transistor M1 and to the non - inverted input of the opera

may be parasitic capacitors or real capacitors . The resistor

tional amplifier OP1 of the filter 107A , a drain ( or source ) elements R1 - R3 are coupled in series between the non

coupled to the input capacitor Cin2 and a gate receiving the 25 inverting output terminal and the inverting output terminal

clock signal 0180 . The NMOS transistor M3 includes a

of the operational amplifier OP1

. The capacitor Cal ( also

source ( or drain ) coupled to the inverted input of the referred as “ the attenuation capacitor " ) is further coupled in

operational amplifier OP1 of the filter 107A , a drain ( or

parallel with the resistor element R2 . The resistor elements

source ) coupled to the input capacitor Cinl and a gate R1 - R3 and the capacitor Cal form an attenuator A1 .

receiving the clock signal 0180 . The NMOS transistor M4 30 In the filter 107B , the capacitor C5 and the resistor

includes a source ( or drain ) coupled to the source ( or drain ) element RF3 are coupled in parallel between the non

of the NMOS transistor M3 and to the inverted input of the inverting input terminal and the inverting output terminal of

operational amplifier OP1 of the filter 107A , a drain ( or

the operational amplifier OP2 . The capacitor C6 and the

source ) coupled to the input capacitor Cin2 and a gate

resistor element RF4 are coupled in parallel between the

receiving the clock signal 00 .

35 inverting input terminal and the non - inverting output termi

The mixer 105B includes NMOS transistors M5

- M8

, asnal of the operational amplifier OP2 . The capacitor C7 is

shown in FIG . 1 . The NMOS transistor M5 includes a source coupled between the non - inverting input terminal of the ( or drain ) coupled to the non - inverted input of the opera operational amplifier OP2 and one terminal of the capacitor

tional amplifier OP2 of the filter 107A , a drain ( or source )

Ca2 . The capacitor C8 is coupled between the inverting

coupled to the input capacitor Cinl and a gate receiving the 40 input terminal of the operational amplifier OP2 and another

clock signal 090 . The NMOS transistor M6 includes a terminal of the capacitor Ca2 . The capacitor C13 is coupled

source ( or drain ) coupled to the source ( or drain ) of the from the non - inverting input terminal of the operational

NMOS transistor M5 and to the non - inverted input of the

amplifier OP2 to GND . The capacitor C14 is coupled from

operational amplifier OP2 of the filter 107A , a drain coupled

the inverting input terminal of the operational amplifier OP2

to the input capacitor Cin2 and a gate receiving the clock 45 to GND . The capacitor C15 is coupled from the output signal 0270 . The NMOS transistor M7 includes a source ( or terminal of the operational amplifier OP2 to GND . The

drain ) coupled to the inverted input of the operational capacitor C16 is coupled from the output terminal of the

amplifier OP2 of the filter 107A , a drain ( or source ) coupled

operational amplifier OP2 to GND . The capacitors C13 - C16

to the input capacitor Cinl and a gate receiving the clock may be parasitic capacitors or real capacitors . The resistor signal 0270 . The NMOS transistor M8 includes a source ( or 50 elements R4 - R6 are coupled in series between the non drain ) coupled to the source ( or drain ) of the NMOS inverting output terminal and the inverting output terminal transistor M7 and to the inverted input of the operational of the operational amplifier OP2 . The capacitor Ca2 ( also

amplifier OP2 of the filter 107A , a drain ( or source ) coupled

referred as “ the attenuation capacitor ” ) is further coupled in

to the input capacitor Cin2 and a gate receiving the clock

parallel with the resistor element R5

. The resistor elements

signal 090 .

55 R4 - R6 and the capacitor Ca2 form an attenuator A2 .

The clock signals 00 , 090 , 0180 and $ 270 are four

The output of the operational amplifier OP1 is I - channel

clock phases generated by a clock divider 109 by dividing output and the output of the operational amplifier OP2 is

the oscillator signals 2LO + and 2LO - wherein the oscillator

Q - channel output . Thus , the receiver 100 of FIG . 1 is a

signals 2LO + and 2LO - are generated by a local oscillator two - channel receiver . Further , the circuit configuration of

( not shown ) .

60 the operational amplifiers OP1 and OP2 are not specified

The filter 107A is coupled to the mixer 105A and the filter

hereby .

107B is coupled to the mixer 105B . The filter 107A is an The passband width of the filters 107A and 107B may be

active filter which includes the operational amplifier OP1

,

changed by controlling the capacitance value of the capaci

the resistor elements RF1 - RF2 and R1 - R3 , and the capaci t ors C1 - C8 or the resistance of the resistor elements R1 - R6 .

tors C1 - C4 , C9 - C12 and Cal . The filter 107B is also an 65

In other possible embodiment of the application , the

active filter which includes the operational amplifier OP2 , capacitors C1 , C2 , C5 and / or C6 may be coupled to GND .

the resistor elements RF3 - RF4 and R4 - R6 , and the capaci -

That is , the capacitors C1 , C2

, C5 and / or C6 may be coupled

(10)

US 10 , 033 , 420 B2

between the respective sources ( or drains ) of the transistors embodiment of the application . The wireless communication M1 - M8 and GND , which is still within the spirit and scope receiver 500 includes an antenna 501 , a balun circuit 503 ,

of the application . For example , the capacitor C1 may be

two input capacitors Cin1 - Cin2 , four mixers 505A1 , 505A2 ,

coupled between the source ( or drain ) of the transistor M1

505B1 and 505B2 and two filters 507A and 507B . The

and GND , and so on . 5 mixers 505A1 , 505B1 and the filters 507A , 507B may have

FIG . 2 shows an equivalent circuit model of the receiver

the same or similar circuit structure and operations with the

of FIG . 1 according to the embodiment of the application . In mixers 105A , 105B and the filters 107A , 107B of FIG . 1 of

FIG . 2 , the single - ended diagram is shown for simplicity ,

the embedment of the application . Details of the mixers

some elements ( for example , the balun circuit 103 , the filter 505A1 , 505B1 and the filters 507A , 507B are omitted here .

107B , the operational amplifier OP2 , the resistor element 10

Now , the mixers 505A2 and 505B2 will be explained . The

RF2

, the capacitors C2 and C4 of the filter 107A ) are

mixer 505A2 includes NMOS transistors M9

- M12 . The

omitted .

As shown in FIG . 2 , the capacitor C1 ( and also the

NMOS transistor M9 includes a source ( or drain ) coupled to

capacitor C2 ) and the operational amplifier OP2 form a

the capacitor C3 of the filter 507A , a drain ( or source )

negative feedback loop for performing negative feedback 15 coupled to the input capacitor Cinl and a gate receiving the

loop control on the output signals from the mixer 105A . The

clock signal 00 . The NMOS transistor M10 includes a

capacitor C3 ( and also the capacitor C4 ) and the attenuator

source ( or drain ) coupled to the source ( or drain ) of the

A1 form a positive capacitive feedback loop for performing

NMOS transistor M9 and to the capacitor C3 of the filter

positive capacitive feedback loop control on the output 507A , a drain ( or source ) coupled to the input capacitor Cin2

signals from the mixer 105A . The negative feedback loop 20 and a gate receiving the clock signal Ø180 . The NMOS

and the positive capacitive feedback loop are coupled in

transistor M11 includes a source ( or drain ) coupled to the

parallel . capacitor C4 of the filter 507A , a drain ( or source ) coupled

The gain ( A0 ) of the operational amplifier OP1 is higher

to the input capacitor Cinl and a gate receiving the clock

than 1 and the gain ( A1 ) of the attenuator A1 is lower than signal 0180 . The NMOS transistor M12 includes a source

1 . If the gain ( AO ) of the operational amplifier OP1 and the 25 ( or drain ) coupled to the source ( or drain ) of the NMOS

gain ( A1

) of the attenuator Al are tuned to be large , then the

transistor M11 and to the capacitor C4 of the filter 507A , a

Q factor of the receiver is also large . In other words , if

drain coupled to the input capacitor Cin2 and a gate receiv

A0 * A1 is larger , then Q is also larger .

ing the clock signal 00 .

At the antenna input side of FIG . 2 , the in - band signal , i . e .

Similarly , the mixer 505B2 includes NMOS transistors

the wanted signal , is small while the " blocker ” , i . e . the 30 M13 - M16 . The NMOS transistor M13 includes a source ( or

out - band signal which is unwanted signals , is large . After

drain ) coupled to the capacitor C7 of the filter 507B , a drain

processed by the receiver of the embodiment of the appli

( or source ) coupled to the input capacitor Cinl and a gate

cation , the in - band signal is amplified while the out - band

receiving the clock signal 090 . The NMOS transistor M14

signal is attenuated .

includes a source ( or drain ) coupled to the source ( or drain )

As shown in output side of the operational amplifier 35 of the NMOS transistor M13 and to the capacitor C7 of the OP1 / OP2 , the receiver according to the embodiment of the filter 507B , a drain ( or source ) coupled to the input capacitor

application has better out - band rejection because of the high

Cin2 and a gate receiving the clock signal 0270 . The NMOS

order LPF / BPF .

transistor M15 includes a source ( or drain ) coupled to the

FIG . 3 shows the transfer functions of the receiver 100 of

capacitor C8 of the filter 507B , a drain coupled to the input

the embodiment of the application . As shown in FIG . 3 , at 40 capacitor Cinl and a gate receiving the clock signal 0270 .

the input side of the mixer 105 , the transfer function TF1 has The NMOS transistor M16 includes a source ( or drain )

the theoretical 4th order BPF ( band pass filter ) characteristic coupled to the source ( or drain ) of the NMOS transistor M15 wherein “ fLO ” refers to the LO frequency ( i . e . the RF and to the capacitor C8 of the filter 507B , a drain ( or source ) frequency ) and “ BW ” is the bandpass filter bandwidth . At coupled to the input capacitor Cin2 and a gate receiving the

the input side of the operational amplifier OP2 , the transfer 45 clock signal 090 .

function TF2 has the theoretical 2nd order LPF characteristic .

As shown in FIG . 5 , the I - channel has the mixers 505A1

In the transfer function TF2 , " f3dB , BB ” is the baseband and 505A2 and the Q - channel has the mixers 505B1 and

signal bandwidth , " rO ” is the output impedance of the

505B2 . The mixers 505A1 and 505A2 , coupled in parallel ,

operational amplifier OP2 and “ CO ” is the capacitance at the are configured to perform frequency conversion on the output side of the operational amplifier OP2 . At the output 50 received RF signal from the antenna 101 by mixing the RF side of the operational amplifier OP2 , the transfer function signal with the local oscillator signal ( i . e . the clock signal )

TF3 has the theoretical 2nd order LPF characteristic . to provide the output signal to the filter 507A . The mixers

FIG . 4 shows a circuit diagram for a single - channel

505A1 and 505A2 substantially have the same or similar

wireless communication receiver 400 according to an

functions and circuit configuration . Similarly , the mixers

embodiment of the application . The wireless communication 55 505B1 and 505B2 , coupled in parallel , are configured to

receiver 400 includes an antenna 401 , a balun circuit 403 ,

perform frequency conversion on the received RF signal

two input capacitors Cin1 - Cin2 , a mixer 405 and a filter 407 . from the antenna 101 by mixing the RF signal with the local

The mixer 405 and the filter 407 may have the same or oscillator signal ( i . e . the clock signal ) to provide the output

similar circuit structure and operations with the mixer 105A ) signal to the filter 507B . The mixers 505B1 and 505B2

105B and the filter 107A / 107B of FIG . 1 of the embedment 60 substantially have the same or similar functions and circuit

of the application . Thus , the circuit operations of the single

configuration .

channel receiver 400 may be referenced to that of the Also , the two - channel - four - mixer receiver 500 of the

two - channel receiver 100 . Also , the single - channel receiver

embodiment of the application has improved LPF and BPF

400 of the embodiment of the application has improved LPF performance .

and BPF performance .

65

In possible embodiment of the application , the resulting

FIG . 5 shows a circuit diagram for a two - channel - four - signals from the operational amplifiers OP1 and OP2 may be

mixer wireless communication receiver 500 according to an

further converted by analog - to - digital converters ( ADC )

(11)

US 10 , 033 , 420 B2

( not shown ) into digital signals , which are then subject to

wherein the negative feedback loop includes an opera

digital processing operations by a digital baseband unit ( not

tional amplifier , a first capacitor and a second capacitor ,

shown ) .

the first capacitor being coupled between a first input

In the above embodiments of the application , the clock terminal and a first output terminal of the operational

signal fed into the mixers 105A , 105B , 405 , 505A1 , 505A2 , 5

amplifier , and the second capacitor being coupled

505B1 and 5056B2 has four clock phases $ 0 , 090 , Ø180

between a second input terminal and a second output

and $ 270 . However , the application is not limited by . In terminal of the operational amplifier ;

other possible embodiments of the application , the clock

wherein the positive capacitive feedback loop includes : a

signal fed into the mixer ( s ) of the receiver may have six or

third capacitor and a fourth capacitor ; and an attenua

eight or more clock phases , which is still within the spirit of 10

the application .

tor , coupled to the third capacitor and the fourth capaci

As described above , compared with the state of the art tor ,

( having 1st order LPF and / or 2nd order BPF ) , the receiver

the third capacitor is coupled between the first input

according to the embodiments of the application include terminal of the operational amplifier and a terminal of

higher - order filter ( for example , but not limited by , theoreti - 15 an attenuation capacitor of the attenuator , and

cal 2nd order LPF and / or theoretical 4th order BPF ) . Thus , the

the fourth capacitor is coupled between the second input

receiver according to the embodiments of the application

terminal of the operational amplifier and another ter

may have advantages over the state of the art , for example

minal of the attenuation capacitor of the attenuator .

but not limited by , better out - band rejection and linearity .

2 . The wireless communication receiver according to

Further , the receiver according to the embodiments of the 20

o claim 1 , wherein the attenuator of the positive capacitive

application has negligible NF degradation because the noise

feedback loop includes a plurality of resistor elements

of the resistor attenuator ( for example , the attenuator Al coupled in series between the first output terminal and the formed by the resistor elements R1 - R3 and the capacitor second output terminal of the operational amplifier , and one

Cal in FIG . 1 ) will be divided by the gain of operational

of the resistor elements is coupled to the attenuation capaci

amplifier OP1

/ OP2 .

25 tor in parallel .

Still further , the Q factor of the receiver according to the

3 . The wireless communication receiver according to

embodiments of the application is tunable by tuning the

claim 2 , wherein the first mixer includes a plurality of active

gains of the attenuator and / or the operational amplifier

elements coupled between the antenna and the first input

wherein the factor may determine the filter shape . Thus , terminal of the operational amplifier or between the antenna

the theoretical 2nd order LPF and / or the theoretical 4th order 30

and the second input terminal of the operational amplifier ,

BPF of the receiver according to the embodiments of the

the plurality of the active elements of the mixer being

application may have good filter shape by tuning the Q

controlled by a plurality of clock phases of the local oscil

factor ( . e . tuning the gains of the attenuator and / or the

lator signal , respectively . 4 . The wireless communication receiver according to

operational amplifier ) .

The receiver of the embodiments of the application may 35 Clai

vos claim 3 , further comprising :

be applied in the wireless communication system , for

a second mixer , coupled to the antenna , for performing

example but not limited by , LTE - A ( Long Term Evolution

frequency conversion on the received wireless commu

( LTE ) - Advanced ) system .

nication signal from the antenna by mixing the wireless

It will be apparent to those skilled in the art that various

communication RF signal with the local oscillator

modifications and variations can be made to the disclosed 40

signal to provide a second intermediate frequency ( IF )

embodiments . It is intended that the specification and

signal ; and

examples be considered as exemplary only , with a true scope

a second filter , coupled to the second mixer , configured to

of the disclosure being indicated by the following claims and

pass a predetermined band of frequencies of the second

their equivalents .

IF signal of the second mixer and to generate a second

What is claimed is : 45 channel signal .

1 . A wireless communication receiver , comprising :

5 . The wireless communication receiver according to

an antenna for receiving a wireless communication signal ;

claim 4 , further comprising :

a first mixer , coupled to the antenna , for performing a third mixer , coupled between the antenna and the first

frequency conversion on the received wireless commu filter ; and

nication signal from the antenna by mixing the wireless 50

a fourth mixer , coupled between the antenna and the

communication signal with a local oscillator signal to

second filter ,

provide a first intermediate frequency ( IF ) signal ; and

wherein

a first filter , coupled to the first mixer , configured to pass

the first and the third mixers , coupled in parallel , are

a predetermined band of frequencies of the first IF

configured to perform performing frequency conver

signal of the first mixer and to generate a first channel 55

sion on the received wireless communication signal

signal , from the antenna by mixing the wireless communica

tion RF signal with the local oscillator signal to provide

wherein the first filter includes :

a negative feedback loop coupled to the first mixer for

the first intermediate frequency ( IF ) signal ; and

performing negative feedback loop control on the first

the second and the fourth mixers , coupled in parallel , are

IF signal from the first mixer ; and configured to perform performing frequency conver

a positive capacitive feedback loop coupled to the first

sion on the received wireless communication signal

mixer for performing positive capacitive feedback loop

from the antenna by mixing the wireless communica

control on the first IF signal from the first mixer , the

tion RF signal with the local oscillator signal to provide

negative feedback loop and the positive capacitive

the second intermediate frequency ( IF ) signal .

feedback loop being coupled in parallel ;

* * * * *

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